NXP   

OCTAL TRANS LATCH INV 3-S

Mfr Part#: 74HC573D,653
Mounting Method:  SurfaceMount 
Package Style:  SOIC-20 
Packaging:  REEL

 
 

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Qty in Stock: 410,000
Reserve Stock: 8,000
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Overview

Product Highlight

  • Family: HC
  • Logic Circuit Type: 
  • Number of Functions: 
  • Supply Voltage-Nom: 5V
  • Output Characteristics: 
The first CMOS (Complementary Metal–Oxide–Semiconductor)  logic family of integrated circuits was introduced 1968. Initially CMOS logic was slower than LS-TTL; however, because the logic thresholds of CMOS were proportional to the power supply voltage, CMOS devices were well-adapted to battery-operated systems with simple power supplies.

Because of the incompatibility of the CD4000 series of chips with the previous TTL family, a new standard emerged which combined the best of the TTL family with the advantages of the CD4000 family. It was known as the 74HC (High performance silicon gate) family of devices.

With HC/HCT logic and LS-TTL logic competing in the market it became clear that a logic device that combined high speed, with low power dissipation and compatibility with older logic families was needed. A whole range of newer families has emerged that use CMOS technology.  Some of the more important family designators of these newer devices includes LV/LVT/ALVT.

The 74HC573; 74HCT573 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL).

The 74HC573; 74HCT573 has octal D-type transparent latches featuring separate D-type inputs for each latch and 3-state true outputs for bus oriented applications. A latch enable (LE) input and an output enable OEinput are common to all latches.

When LE is HIGH, data at the Dn inputs enter the latches. In this condition the latches are transparent, i.e. a latch output will change state each time its corresponding D input changes.

When LE is LOW the latches store the information that was present at the D-inputs a set-up time preceding the HIGH-to-LOW transition of LE. When OE is LOW, the contents of the 8 latches are available at the outputs. When OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input does not affect the state of the latches.

The 74HC573; 74HCT573 is functionally identical to:

·         74HC563; 74HCT563, but inverted outputs

·         74HC373; 74HCT373, but different pin arrangement

The 74HC573D-T is a 3-State Octal D-Type Latch. It comes in a  20Pin SOIC Pkg.

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