By Riccardo Collura
EMEA Vertical Segment Manager (Power), Future Electronics
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When designing the gate-drive circuit for a silicon MOSFET or IGBT, engineers have always had to exercise fine judgment about the perennial cost/performance trade-off. The designer’s understanding of the particular characteristics of the chosen switch has informed decisions such as whether to use an isolated or non-isolated driver, and the maximum propagation delay acceptable in the application. Decades of experience developing these circuits have produced a rich mix of know-how, literature, and best practices on which to draw.
But the design guidelines appropriate to silicon transistors cannot straightforwardly be applied to gate-drive circuits for the new generation of wide-bandgap (WBG) semiconductors: silicon carbide (SiC) MOSFETs and gallium nitride (GaN) high electron-mobility transistors (HEMTs).
Drawing on analysis carried out by Future Electronics in the development of its GaNdalf reference design board for a bridgeless totem pole Power Factor Correction (PFC) system, and the TobogGaN ultra-compact 60 W ac-dc converter, this article offers new insights into potential pitfalls when selecting a discrete gate driver for a WBG semiconductor.
Related: Wide Bandgap Guide
Key parameters which affect the performance of gate drivers
Designers typically study a small number of key parameters specified in the datasheet to gauge the performance of a discrete gate driver. These parameters include:
Fig. 1: Typical specifications for the various types of power switch (Image credit: Future Electronics)
Figure 1 shows the typical values of these parameters for silicon power switches (MOSFETs and IGBTs), and for WBG semiconductors. It is clear that there are some substantial differences in the key parameters between the silicon and the WBG devices, and even between SiC MOSFETs and GaN HEMTs. SiC MOSFETs and GaN HEMTs can operate at frequencies up to ten times higher than standard silicon devices, as well as tolerating higher temperatures while producing much lower switching and conduction losses. It is this combination of features which is so attractive to designers of applications such as electric vehicle chargers, USB Type-C® power adapters, solar inverters and more: in all of these applications, the use of WBG switches enables the development of smaller, lighter, and more efficient power circuits.
Design requirements of a WBG device driver
The scale of the differences between silicon and WBG switches tends to indicate that a dedicated gate driver is required for the WBG devices. And growth in demand for WBG devices is now inducing WBG device manufacturers to invest heavily in gate drivers to complement their switch products. Improved availability and a widening choice of products make the market more competitive, and so reduce the price premium on these specialist parts.
So which issues determine the choice of the correct gate driver for a SiC MOSFET or GaN HEMT?
The first question to consider is the topology in which the device is being used. For soft-switching topologies such as an LLC circuit in a dc-dc power stage, an isolated driver is not necessarily required, and a cheaper non-isolated driver may be used.
It is different for hard-switching topologies such as the bridgeless totem pole PFC system implemented in the GaNdalf reference design. Here, an isolated gate driver, at least for the high-side switch, is recommended.
For half-bridge topologies, half-bridge (dual) gate drivers save space by combining the drivers for the high and low sides of the bridge in a single package. Sometimes, however, two single-channel drivers give the designer more flexibility. In applications switching at a frequency higher than 150 kHz, the use of two drivers can help to reduce common-mode noise.
The choice of driver for a GaN HEMT depends on which of the two types it is: the cascode type is easier to drive as it has an integrated low-voltage silicon FET. The gate driver drives this FET, rather than the GaN device itself, so a standard, cheap gate driver for silicon devices is suitable. The drawback is that this low-voltage FET will add output capacitance, which limits the switching speed (dv/dt), resulting in higher switching losses.
The other type is the enhancement-mode, or e-mode, GaN HEMT. This needs a dedicated GaN gate driver, of which more below.
Gate drivers for SiC MOSFETs
One of the reasons that design engineers end up choosing a dedicated gate driver for SiC MOSFETs is that every MOSFET manufacturer recommends a different gate-source voltage to drive their products. Some manufacturers will advise users to drive their SiC MOSFETs with a negative voltage. This ensures that the device is turned off completely, and eliminates the risk of spurious turn-on in devices which have a low gate-source voltage threshold. For others, a negative voltage is not required to switch off the device, as they have a higher gate-source voltage threshold.
When evaluating a driver, the datasheet will reveal a lot about the way a SiC MOSFET will perform with it. The key parameters to study are:
In fact, the gate-source voltage has a huge impact on on-resistance: sometimes, a SiC MOSFET with lower on-resistance according to the datasheet will end up with higher conduction losses simply because it is not being driven at the recommended gate-source voltage.
Switching losses are also strongly affected by the power-system design. Capacitive turn-on is a common cause of high switching losses in SiC MOSFETs. If the induced gate-source voltage related to the capacitance ratio of the device is higher than the nominal threshold voltage, then the risk of capacitive turn-on is higher, as shown in Figure 2. Designers should look for a positive balance, where the threshold voltage is higher than the induced gate-source voltage, to protect the device from the risk of parasitic turn-on.
Fig. 2: The capacitive turn-on effect in a SiC MOSFET (Image credit: Infineon)
Another issue to be aware of when specifying a gate driver for a fast-switching SiC MOSFET is noise. An important parameter to consider is the gate-drain capacitance, Cgd. When high gate-drain capacitance is combined with a low threshold voltage, the MOSFET can be susceptible to Miller turn-on effects. In addition, voltage coupling due to intrinsic device capacitances can lead to poor switching waveforms and undesirable cross-conduction effects.
There is a remedy: the Future Electronics recommendation is to review the SiC MOSFET’s datasheet ratings for gate-drain capacitance, and the ratio of gate-source capacitance to gate-drain capacitance. If gate-drain capacitance is relatively high, it might be desirable to select a gate driver with a Miller clamp function. And where the ratio between gate-source and gate-drain capacitance is low, it is good practice to increase gate-source capacitance with an external capacitor.
Evaluation by the Future Electronics engineering Centre of Excellence using the GaNdalf development platform showed that a Miller clamp-enabled driver combined with additional gate-source capacitance improved switching performance and the overall operation of the system, and this fed through to markedly improved efficiency and switching waveforms, and lower total harmonic distortion.
This experience shows that optimal performance will be achieved when using a dedicated SiC gate driver. It is, though, possible to choose a simpler and cheaper gate driver: in this case, the designer must implement external circuitry to regulate the SiC MOSFET’s operation, otherwise the system can suffer from severe thermal problems, and consequently from reduced efficiency and increased EMI.
Gate drivers for e-mode GaN HEMTs
E-mode GaN HEMTs such as the CoolGaN™ family from Infineon have a low threshold voltage, typically 1.2 V, and peak gate-drive current is normally less than 1 A with an 8 V drive voltage. To keep the device in the On state, a steady-state current of 5 mA to 10 mA is required.
A negative gate-source voltage turns an HEMT off, sinking a current peak out of the gate. The voltage then reverts to 0 V, and finally to a negative value after a long interval to maintain the Off state, as shown in Figure 3.
It is important to select a driver which offers scope to configure the timing of these operations: this avoids the risk of impairing the HEMT, since a single overshoot on the gate-source voltage can permanently damage the device.
Fig. 3: The voltage and current waveforms of a GaN HEMT through the switching cycle (Image credit: Infineon)
Advantages of integrated driver and HEMT
In most low-power applications, that is, those supplying less than 1 kW, the driver will typically be integrated with the GaN HEMT. A single package simplifies the board layout and reduces the leakage of EMI generated by high-frequency switching into the rest of the system.
Examples of such an integrated device are the InnoSwitch™3 and InnoSwitch4-CZ from Power Integrations for applications up to 100 W. These devices integrate a PowiGaN HEMT rated for up to 750 V, a quasi-resonant power controller, a FluxLink™ interface which eliminates the need for an optocoupler, and a synchronous rectifier controller.
Designers can use these devices to achieve very high power density: the TobogGaN board from Future Electronics is a 60 W ac-dc power supply which measures 58 mm x 49 mm x 32 mm and achieves power density of 20 W/in3. At the heart of the board is the Power Integrations InnoSwitch3-Pro.
Another option is the MasterGaN® platform from STMicroelectronics, for soft-switching topologies supplying up to 500 W.
And also, Infineon’s CoolGaN integrated power stage (IPS) pairs CoolGaN 600 V e-mode GaN switches with dedicated EiceDRIVER™ gate drivers in thermally-enhanced QFN packages. The IPS devices are available in both single-channel and half-bridge configurations.
Proven techniques for matching driver and switch
This article shows that extra care needs to be taken when selecting a gate driver for a SiC MOSFET or GaN HEMT, but that when properly implemented, a WBG semiconductor-based power system can offer improved performance and reliability at lower cost than the silicon-based equivalent.
Gate drivers for SiC MOSFETs reward close examination of datasheet values, and attention to the risks of parasitic turn-on events, while users of GaN HEMTs are well served by a wide choice of integrated driver/switch packages which provide a ready-made solution to the problem of selecting an appropriate driver for low- to mid-power applications.
Board name: GaNdalf II
Board manufacturer: Future Electronics
The GaNdalf II board provides an adaptable and flexible blueprint for the design of a bridgeless power factor correction circuit based on the latest CoolGaN enhancement-mode power transistors from Infineon. Offering peak efficiency of >99% and total harmonic distortion of <5%, GaNdalf II is the ideal starting point for highly efficient power-conversion designs supplying loads up to 2 kW.
Board name: TobogGaN
Board manufacturer: Future Electronics
The 60 W TobogGaN reference design board is a complete ac-dc converter for industrial and telecoms auxiliary power supplies. It is also ideal for any general-purpose application which requires high efficiency, small size, or the flexibility to use a single design across multiple end products.
At the heart of the board is the InnoSwitch™3-Pro from Power Integrations, a highly integrated flyback controller which reduces component count and saves board space.
Appendix: Glossary of terms
Threshold voltage: minimum voltage when the gate capacitor is charged and the device can just conduct.
Common-mode transient immunity (CMTI): key specification for isolated gate drivers, it is the maximum tolerable rate of rise or fall of the common-mode voltage applied between two isolated circuits. The unit is normally in kV/µs or V/ns. High CMTI means that the two isolated circuits, both transmitter-side and receiver-side, will function well within the datasheet specification.
Negative gate-drive voltage: generally not needed for high-voltage MOSFETs, sometimes used for IGBTs. It is definitely needed for most SiC and GaN switches.
Miller clamp: a low-impedance switch which redirects the current induced by dv/dt. The Miller clamp keeps the device in the Off state, either by connecting the MOSFET’s gate to ground or to a negative voltage rail.
DESAT: the most common over-current protection circuit. It is the default choice for many applications because it is simple to implement.
Bootstrap circuit: a step-up charge pump composed of a switch, a capacitor, and a diode, where a voltage equal to the switch voltage (Vin) plus the internal supply voltage is used as the gate drive for the high-side N-channel MOSFET.
Dead time: period during which neither device is switched, to avoid any potential overlap when they are in a half-bridge configuration. There are a few factors affecting the dead-time setting: the pulse-width distortion, propagation delay, and rise and fall times. It is important to maintain a minimum dead time in order to improve converter efficiency. During the dead time, current flows back through the body diode. The body diode has a much larger voltage drop than the device itself, and thus there are higher conduction losses. The longer the dead time, the higher the losses, which reduce efficiency and generate heat. Thus it is best to minimize the dead time by using a gate driver with low pulse-width distortion, low propagation delay, and short rise and fall times.
Pulse-width distortion: determined by the propagation delay mismatch of the rising and falling edges.
Propagation delay: one of the key parameters of a gate driver, it can affect the losses and safety of high-frequency systems. It is defined as the time delay from 50% of the input to 50% of the output. This delay affects the timing of the switching between devices, which is critical in high-frequency applications where the dead time, or off time between devices, is limited.
Under-voltage lock-out (UVLO): monitors the supply pins of a gate driver to make sure that the voltage remains above a certain threshold, and thus to maintain proper operation.