text.skipToContent text.skipToNavigation

Manufacturer Part #


HEW IDE and C Compiler Super H Family 1 User + HW Key

Mfr. Name: Renesas
Standard Pkg:
Product Variant Information section
Date Code:
Product Specification Section
Technical Attributes
Attributes Table
Application Type: Code Development
Core Supported: SH Series
Features & Applications

The YRTA-HEWSH-1U is a High-performance Embedded Workshop provides a GUI-based integrated development environment allows you to use various development tools for application software under a single user interface.The Renesas SH C Compiler is an optimising ANSI C and ANSI C++ compiler for the SuperH embedded RISC microprocessor family. The SH C package includes a compiler, assembler and linker is supplied as part of the High-performance Embedded Workshop IDE.

In addition to full ANSI C support, the compiler provides #pragma language extensions and command-line switches to support target specific features and extended compiler functionality. The SH C compiler has powerful and reliable code generation facilities for SH targets. A variety of optimisation features allow you to generate highly optimised PROMable code. In particular, code can be optimised for size or speed to match the requirements of the particular application being developed.


  • C/C++ Compiler:
    • Object generation in all CPUs from SH-1 to SH-4
    • Complies with C/C++ language in ANSI specification
    • Introduces the latest optimization technology developed for supercomputers 
      • Optimization at recompilation using link information (optimization of access to external variable ) 
      • Inter-module optimization of access to external variable
    • Extended language function for SuperH RISC engine family 
      • Intrinsic functions 
      • Section address operators 
      • #pragma directives 
    • Embedded C++ language spec-compliant class libraries
    • High performance DSP library optimized by DSP instruction
    • Supports DSP-C language
  • Assembler:
    • Instruction support to all CPU from SH-4 to SH-1 include DSP
    • Description of Double accuracy floating point constant is possible
    • File include function
    • Assembly function with condition
    • Macro function
  • Optimizing Linkage Editor:
    • Compression function of debug information
    • Inter-module optimization function
    • Plurality load module selection 
    •  Relocatable ELF format 
    •  Absolute ELF format 
    •  S type format
    •  HEX format 
    •  Binray format
    • Support ELF/DWARF2 format
    • Creation and edition of library file is possible
  • Format Converter:
    • Conversion from the old format to ELF format
    • Conversion from ELF format to the old format
Pricing Section
Minimum Order:
Multiple Of:
On Order:
Factory Stock:Factory Stock:
Factory Lead Time:
Web Price
Product Variant Information section