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Product Variant Information section
Product Specification Section
Pricing Section

Stock: 933,042

On Order: 0
Factory Stock:Factory Stock: 0
Factory Lead Time: 4 Weeks
Minimum Order: 1
Multiple Of: 1
Quantity Web Price
1 $0.0592
250 $0.0427
500 $0.041
750 $0.0401
1,500+ $0.0385
Total:

$0.12

USD
Attributes
Attributes Table
Logic Circuit Buffer/Line Driver
Family A/LVC/E/H/U
No of Functions / Channels 1
Output Characteristics 3-ST
Supply Voltage-Nom 1.65V to 5.5V
Power Dissipation 0.25W
Propagation Delay 1.7ns
Operating Temperature -40°C to +125°C
Capacitance 5pF
No of Inputs 1
No of Outputs Single
High Level Output Current -32mA
Low Level Output Current 32mA
No of Pins 5
Quiescent Current 0.1µA
Moisture Sensitivity Level 1
Features and Applications

The 74LVC1G125GW provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (OE). A HIGH-level at pin OE causes the output to assume a high-impedance OFF-state.

The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

Features:

  • Wide supply voltage range from 1.65 V to 5.5 V
  • High noise immunity
  • Complies with JEDEC standard:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8-B/JESD36 (2.7 V to 3.6 V)
  • ±24 mA output drive (VCC = 3.0 V)
  • ESD protection:
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V
  • CMOS low power consumption
  • Inputs accept voltages up to 5 V
  • Latch-up performance exceeds 250 mA
  • Direct interface with TTL levels
  • Multiple package options
  • Specified from –40 ℃ to +85 ℃ and –40 ℃ to +125 ℃