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Product Variant Information section
Product Specification Section
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Attributes Table
Input Voltage-Max 2420mV
Temperature Range -40°C to +85°C
Supply Voltage-Nom 3V to 3.8V
Frequency-Max 1GHz
Features and Applications

The MC100LVEL14 is a low skew 1:5 clock distribution chip designed explicitly for low skew clock distribution applications. The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. The LVEL14 is functionally and pin compatible with the EL14 but is designed to operate in ECL or PECL mode for a voltage supply range of −3.0 V to −3.8 V ( or 3.0 V to 3.8 V).

The internal flip flop is clocked on the falling edge of the input clock, therefore all associated specification limits are referenced to the negative edge of the clock input. The VBB pin, an internally generated voltage supply, is available to this device only. For single−ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 µF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open.

Key Features:

  • 50 ps Output-to-Output Skew
  • Synchronous Enable/Disable
  • Multiplexed Clock Input
  • ESD Protection: Human Body Model >2 kV
  • The 100 Series Contains Temperature Compensation
  • PECL Mode Operating Range: VCC = 3.0 V to 3.8 V with VEE = 0 V
  • NECL Mode Operating Range: VCC = 0 V with VEE = −3.0 V to −3.8 V
  • Internal Input Pulldown Resistors on CLK
  • Q Output will Default LOW with Inputs Open or at VEE
  • Moisture Sensitivity Pb = Level 1
  • Pb−Free = Level 3
  • Flammability Rating:
    • UL 94 V−0 @ 0.125 in
    • Oxygen Index: 28 to 34
  • Transistor Count = 303 devices