Manufacturer Part #
Z80C30 Series 5 V Surface Mount CMOS Serial Communication Controller - PLCC-44
|Standard Pkg:|| |
Product Variant Information section
25 per Tube
Zilog Z80C3008VSG - Product Specification
Zilog Z80C3008VSG - Technical Attributes
|No of Functions / Channels:||2|
|Mounting Method:||Surface Mount|
$Features & Applications
An industry leader since its inception, the 8-bit Z80 microprocessor is still popular with engineers worldwide after many years of production. Ideal for embedded control applications, the Z80 architecture incorporates dual register banks that enable fast context switching and interrupt handling.
The Z80 CPUs are fourth-generation enhanced microprocessors with exceptional computational power. They offer higher system throughput and more efficient memory utilization than comparable second- and third generation microprocessors.
The speed offerings from 6 -20 MHz suit a wide range of applications which migrate software. The internal registers contain 208 bits of read/write memory that are accessible to the programmer. These registers include two sets of six general purpose registers which may be used individually as either 8-bit registers or as 16-bit register pairs.
In addition, there are two sets of accumulator and flag registers. A group of “Exchange” instructions makes either set of main or alternate registers accessible to the programmer. The alternate set allows operation in foreground-background mode or it may be reserved for very fast interrupt response.
The CPU also contains a Stack Pointer, Program Counter, two index registers, a Refresh register (counter), and an Interrupt register. The CPU is easy to incorporate into a system since it requires only a single +5V power source. All output signals are fully decoded and timed to control standard memory or peripheral circuits; the CPU is supported by an extensive family of peripheral controllers.
Zilog's Z80C30 Serial Communications Controller is a pin- and software-compatible CMOS member of the SCC family introduced by Zilog in 1981. It is a dual-channel, multiprotocol data communications peripheral that easily interfaces to CPUs with multiplexed address/data buses.
25 per Tube