Nexperia | 74LVC573APW,118

The 74LVC573APW is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

Inputs can be driven from either 3.3 or 5 V devices. In 3-state operation, outputs can handle 5 V. This feature allows the use of these devices as translators in a mixed 3.3 or 5 V environment.

Features:

• 5 V tolerant inputs/outputs, for interfacing with 5 V logic
• Supply voltage range from 1.2 to 3.6 V
• Inputs accept voltages up to 5.5 V
• CMOS low power consumption
• Direct interface with TTL levels
• High impedance when VCC =0 V
• Flow-through pin-out architecture
• Complies with JEDEC standard no. 8-1A
• ESD protection:
  • HBM EIA/JESD22-A114-A exceeds 2000 V
  • MM EIA/JESD22-A115-A exceeds 200 V
• Specified from -40 to +85 Cel and -40 to +125 Cel