Manufacturer Part #
MC100EP451 Series 3 GHz 5.5 V ECL 6−Bit Differential Register with Master Reset
|Mfr. Name:||ON Semiconductor|
|Standard Pkg:|| |
Product Variant Information section
250 per Tray
Initial Notification of ASE-SH Qualification for 32,48 and 100 lead LQFP.This is an Initial Product Change Notice to make customers aware that ASE-SH, located in Shanghai, China is being qualified as a supplemental assembly source for ON Semiconductor's 32, 48 and 100pin LQFP packages. The devices listed on this IPCN have historically been assembled at the Unisem located in Batam, Indonesia.
|Temperature Range:||-40°C to +85°C|
|Supply Voltage-Nom:||3V to 5.5V|
|Mounting Method:||Surface Mount|
Features & Applications
The MC100EP451FAG is a 6−bit fully differential register with common clock and single−ended Master Reset (MR). Available in a LQFP-32 package.
It is ideal for very high frequency applications where a registered data path is necessary. The 100 Series contains temperature compensation.
- 450 ps Typical Propagation Delay
- Maximum Frequency > 3.0 GHz Typical
- Asynchronous Master Reset
- 20 ps Skew Within Device, 35 ps Skew Device−To−Device
- PECL Mode Operating Range: VCC = 3.0 V to 5.5 V With VEE = 0 V
- NECL Mode Operating Range: VCC = 0 V With VEE = −3.0 V to −5.5 V
- Open Input Default State
- Safety Clamp on Inputs
- Pb−Free Packages are Available
250 per Tray