Manufacturer Part #
ARM® Cortex®-M0+ PSOC® 4100S Microcontroller IC 32-Bit 48MHz 64 kB Flash QFN-32
Subject: Qualification of ASE Kaohsiung (ASE-KH) as an Additional Assembly Site for Select 32-Lead and 40-Lead QFN Pb-Free PSoC Products Description of Change: Cypress announces the qualification of Advanced Semiconductor Engineering-Kaohsiung (ASE-KH, 26 Chin 3rd Road, Nantze Export Processing Zone, Kaohsiung, Taiwan 811, ROC) as an additional assembly site for select 32-Lead and 40-Lead QFN Pb-Free PSoC products. Benefit of Change: Qualification of alternate manufacturing sites is part of the ongoing flexible manufacturing initiative announced by Cypress. The goal of the flexible manufacturing initiative is to provide the means for Cypress to continue to meet delivery commitments through dynamic, changing market conditions. Approximate Implementation Date: Effective 90 days from the date of this notification or upon customer approval, whichever comes first, all shipments of Commercial, Industrial and Automotive non-PPAP part numbers in the attached file will be assembled at ASE-KH or other approved assembly sites. Anticipated Impact: Products assembled at the new site are completely compatible with existing products from form, fit, functional, parametric and quality performance perspectives. Cypress also recommends that customers take this opportunity to review these changes against current application notes, system design considerations and customer environment conditions to assess impact (if any) to their application.
Addendum to PIN195102 - Manufacturing Label and Packing Configuration Standardization Description of Change: The purpose of this addendum is to correct the date from January 20, 2019 to January 20, 2020, in the "3rd paragraph in the 'Description of Change' section. This notification is to inform customers that Cypress will be standardizing its manufacturing labels and tray/tube packing configuration. It may be recalled that the Cypress entity consolidation (following the merger with Spansion Corp) was announced via Product Information Notification PIN174801 in November 2017. As the next phase of the entity consolidation process, Cypress will be adapting a new manufacturing label format for all products and revising shipping configurations for select product shipped in trays and tubes.
Description of Change: Cypress has qualified an EIA standard carrier tape for select QFN packages at Cypress Philippines (CML, Gateway Business Park, SEPZA, Brgy., Javalera, General Trias, Cavite, Philippines). The new carrier tape meets the Cypress specification and demonstrates the same quality as the current carrier tape being used. Benefit of Change: This change is part of Cypress' continuous quality improvement to standardize tape and reel materials at Cypress Philippines.
Qualification of New Bill of Materials for QFN Pb-Free Packages Assembled at Cypress Philippines Description of Change: Cypress announces the qualification of new bill of materials (BOM) for QFN Pb-Free packages assembled at Cypress Philippines (CML, Gateway Business Park, SEPZA, Javalera, Gen. Trias Cavite, Philippines). These changes have been done to simplify the process flow or control resulting in better product quality, field reliability and continuity of supply. This in turn provides the means for Cypress to continue to meet our customers' requirements and meet our delivery commitments in dynamic market conditions. These products are ROHS compliant.
Description of Change: Cypress has qualified an EIA standard outline cover tape for all tape and reel shipment at Cypress Philippines (CML, Gateway Business Park, SEPZA, Brgy., Javalera, General Trias, Cavite, Philippines). The new cover tape meets the Cypress specification and demonstrates the same quality as the current cover tape.
Description of Change: Cypress announces the qualification of Fab 25 in Austin, Texas with the Copper (Cu) Backend of Line (BEOL) process and Test 25 as an additional wafer sort site for the MBR3, PSoC� 4000 and PSoC� 4100S product families. The Aluminum (Al) BEOL process uses Tungsten (W) plugs and Ti/TiN/Al metallization with subtractive patterning to create the metal interconnect layers. The Cu BEOL process converts the underlying metal interconnect layers from W plugs to Cu plugs and from Ti/TiN/Al metallization with subtractive patterning to Cu damascene with Ta/TaN barriers.