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Manufacturer Part #


CY23S05 Series 5 Output 3.3 V 133 MHz Spread Aware Zero Delay Buffer SMT -SOIC-8

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Mfr. Name: Cypress
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Technical Attributes
Attributes Table
Package Style:  SOIC-8
Mounting Method: Surface Mount
Features & Applications

The CY23S09 is a low-cost 3.3V zero delay buffer designed todistribute high-speed clocks and is available in a 16-pin SOIC package. The CY23S05 is an eight-pin version of the CY23S09. It accepts one reference input, and drives out five low-skew clocks. The -1H versions of each device operate at the -1 devices. All parts have on-chip PLLs that lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. The CY23S09 has two banks of four outputs each, which can be controlled by the Select inputs as shown in the Select Input Decoding table on page 2. If all output clocks are not required, Bank B can be three-stated. The select inputs also allow the input clock to be directly applied to the outputs for chip and system testing purposes.

All outputs have less than 200 ps of cycle-to-cycle jitter. The input to output propagation delay on both devices is guaranteed to be less than 350 ps, and the output to output skew is guaranteed to be less than 250 ps.

The CY23S09 and CY23S05 PLLs enter a power-down mode when there are no rising edges on the REF input. In this state, the outputs are three-stated and the PLL is turned off, resulting in less than 12.0 μA of current draw (for commercial temperature devices) and 25.0 μA (for industrial temperature devices). The CY23S09 PLL shuts down in one additional case, as shown in the table below.

Please see datasheets for additional information.


The CY23S05SXC-1HT Low-Cost 3.3V Spread Aware™ Zero Delay Buffer, 8-pin 150-mil SOIC, commercial temperature, lead free.
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