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Nexperia

 

Ideal for multiple I/O voltages, 74LVC8T595 performs voltage-level translation using an 8-stage shift register and an 8-bit storage register with 3-state outputs. The device operates in the 1.1 to 5.5 V range, enabling newer low-voltage controllers to interface with legacy solutions 74LVC8T595 is suitable for SIPO (serial-in/parallel-out) shift register implementations.

74LVC8T595 benefits from Nexperia's LVC family technology with IOFF circuitry for partial power down-mode operation, which contributes to energy savings.

74LVC8T595's shift and storage register have separate clocks. Data is shifted on the positive edge of the SHCP input and data in the shift register is transferred to the storage register on a positive edge of the STCP input.

Part of our Standard Logic range, 74LVC8T595 is available in 20-pin TSSOP leaded and DQFN leadless packages. Both packages are specified for -40°C to +125°C and can be released in our Automotive (-Q100) portfolio.

 

 

 

 

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