STMicroelectronics has introduced the new STGAP3S family of gate drivers for silicon carbide (SiC) and IGBT power switches. The drivers combine the latest robust galvanic isolation technology from ST with optimized desaturation protection and a flexible Miller clamp architecture.
Featuring reinforced capacitive galvanic isolation between the gate-driving channel and the low-voltage control and interface circuitry, the STGAP3S withstands a transient isolation voltage of up to 8 kV, and provides 200 V/ns of common-mode transient immunity. The isolation capability means that the STGAP3S can enhance reliability in motor drives for industrial applications. The new drivers are also ideal for power-control and energy applications.
The STGAP3S family includes options for 10 A and 6 A current capability, each available with different under-voltage lockout and desaturation intervention thresholds. This helps designers to select the best gate driver to match the performance of the SiC MOSFET or IGBT power switch.
The desaturation protection implements overload and short-circuit protection for the external power switch: this means that the designer can adjust the turn-off strategy using an external resistor to maximize the protection turn-off speed while avoiding excessive over-voltage spikes. The integrated Miller clamp architecture in the driver provides a pre-driver for an external N-channel MOSFET.
Together, these features mean that designers have the flexibility to select a suitable intervention speed which both prevents induced turn-on and avoids cross-conduction.
Part Number: EVLSTGAP3S6S
The EVLSTGAP3S6S is a half-bridge evaluation board for evaluating the STGAP3S6S isolated single gate driver from STMicroelectronics.
The STGAP3S6S features a maximum 6 A current capability, rail-to-rail outputs, and optimized under-voltage lockout and desaturation protection thresholds for silicon carbide (SiC) MOSFETS. It is ideal for use in high-power industrial motor drivers.
The gate driver has a single Output pin and a driver line for an external Miller clamp N-channel MOSFET: this optimizes the suppression of positive and negative gate spikes during fast commutations in half-bridge topologies.
Device protection features are connected to the recommended network on the board and can be easily evaluated through the board test points. Dual Input pins allow the selection of signal-polarity control and hardware interlocking protection to avoid cross-conduction in case of controller malfunction.
The gate driver allows negative gate driving, and the onboard isolated dc-dc converters provide an optimized drive voltage for SiC MOSFETs.
Key features:
Sign up for access to exclusive development boards, an essential tool for many innovative design projects.
*Available to pre-qualified EMEA customers only.
Be at the forefront of New Technology Innovations
Be at the forefront of New Technology Innovations
© 2025 Future Electronics. All rights reserved. Privacy | Terms & Conditions of Sale | Terms of Use | Accessibility
