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Référence fabricant
DSPIC30F3012-20E/ML
dsPIC30F Series 24 KB Flash 2 KB RAM 5.5 V Digital Signal Controller - QFN-44
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| Nom du fabricant: | Microchip | ||||||||||
| Emballage standard: | Product Variant Information section Emballages disponiblesQté d'emballage(s) :45 par Tube Style d'emballage :QFN-44 Méthode de montage :Surface Mount | ||||||||||
| Code de date: | |||||||||||
Microchip DSPIC30F3012-20E/ML - Spécifications du produit
Informations de livraison:
ECCN:
Informations PCN:
*** Update for PCN 113339 ***Description of Change: Qualification of UNIG as a new assembly site for various products available in Tube, Tray and Tape & Reel packing media.Reason for Change: To improve on-time delivery performance by qualifying UNIG as a new assembly site.Estimated First Ship Date: 30 June 2025 (date code: 2527)Revision History:November 22, 2023: Issued initial notification.October 31, 2024: Re-issued initial notification. Updated the qualification plan to include High Temperature Storage Life (HTSL) test. Updated the affected CPN list to remove the EOL'd CPNs. Updated the estimated qualification completion date and the timetable summary from June 2024 to October 2024.May 30, 2025: Issued final notification. Attached the Qualification Report. Provided estimated first ship date to be on June 30, 2025. Updated affected CPN list based on the updated scope to remove selected 93LCxx, 93AAxx, 93C4xx, MCP6xx, 93C8xx, 93C7xx, 24C0xx, MCP1xx, 93C6xx, 24FCxx, SY88xx, PIC1xx, MIC5xx, SY58xx, SY89xx, 93C5xx, 24LCxx, 24AAxx, 34AAxx, 25LCxx, 25AAxx, SPN1xx and MICRxx device families and to add selected MIC46xx, SM802xx, SM803xx, MIC52xx, MIC53xx, MIC82xx, MIC27xx, MIC26xx, MIC84xx, MIC20xx, MIC94xx, MIC22xx, MIC23xx, MIC28xx, MIC44xx, PIC12xx, PIC16xx, PIC18xx and dsPIC33FJ32MC202 device families.September 18, 2025: Re-issued final notification to update the Qualification Report to include wire bond pull, wire bond shear and solderability test results. Updated affected CPN list to remove EOL'd CPNs.
*** Update for PCN 115312 ***Description of Change:Qualification of QMI519 as a new die attach material and CuPdAu as a new bond wire material for various products available in PLCC, QSOP, SOIC, SOIJ, SSOP, TSSOP, MQFP, TQFP, DFN, QFN, QFN-S, SQFN, TDFN, UDFN, UQFN, VDFN, VQFN, WQFN and TQFP packages assembled at MP3A, MTAI and MMT sites.Reason for Change:To improve manufacturability by qualifying QMI519 as a new die attach to standardize the use of PFAS free material and CuPdAu as a new bond wire material.Estimated First Ship Date:September 03, 2025 (date code: 2536)Revision History:July 22, 2025: Issued final notification.August 15, 2025: Re-issued the final notification to update the qualification report list, which now includes either a link to the qual report or an attached PDF file for each CCB. Updated the affected CPN list to removed EOL'ed CPNS: ATECC608A-MAHLG-T, ATECC608A-MAHVL-T, ATECC608A-MAHVM-T, ATECC508A-MAHPH-S, ATECC508A-MAHUW-T, ATECC608B MAH5O-T, ATECC508A-MAHKN-T, ATECC608B-MAHAF-S, ATECC508A-MAHKN-S, ATECC508A-MAH1A-T, ATECC608A-MAH4K-T, ATECC608A-MAH3P-T, ATECC608A MAH3Q-S, ATECC608A-MAH4W-T, ATECC608A-MAHAC-S, ATECC608A-MAHD3-S, ATECC608A-MAHGA-T, ATECC608A-MAHGX-T, ATECC508A-MAH2E-T, ATECC608A MAH2B-T, ATECC608A-MAH2G-S, ATECC608A-MAHT2-B, ATECC508A-MAH1C-S, ATECC508A-MAH1Q-S, ATECC508A-MAH1Q-T, ATECC608A-MAH1G-S, ATECC608A MAH1G-T, ATECC608A-MAH1K-S, ATECC508A-MAHWW-S, ATECC508A-MAHWW-T, ATECC608B-MAHAK-S, ATECC608B-MAHPA-T, ATECC608B-MAHSB-T, ATECC608B MAHSC-T, ATECC608A-MAH2U-T, ATECC608A-MAH2V-S, ATECC608A-MAH2X-S, ATECC608A-MAH2Y-S, ATECC608A-MAH3J-T and ATECC608A-MAH1W-T.September 18, 2025: Re-issued the final notification to add PFAS Elimination and Die Attach Explanation file and updated the affected CPN list to remove ATMEGA8535L-8JU, AT89LP6440-20JU, X34070T-H/ST, LX34050QPW-TR, LX3302AQPW-TR-EASY, LX3302AQPW-TR-C01, LX34311T-H/ST, LX34070AT-H/ST, LX34070-H/ST, LX34050QPW, LX3302AQPW-EASY, LX34070T-H/STVAO, LX3302AQPW-TR, LX34050QPW-TR-VAO, LX3302AQPW-TR-GM, LX34311T-H/STVAO, LX34070AT-H/STVAO, LX34070-H/STVAO, LX3302AQPW and LX34050QPW-VAO.
*****FPCN114582 UPDATE/MATERIAL CHANGEQualification of QMI519 as a new die attach material and CuPdAu as a new bond wire material for various products available in PLCC, QSOP, SOIC, SOIJ, SSOP, TSSOP, MQFP, TQFP, DFN, QFN, QFN-S, SQFN, TDFN, UDFN, UQFN, VDFN, VQFN, WQFN and TQFP packages assembled at MP3A, MTAI and MMT sites.*Re-issued the final notification to update the qualification report list, which now includes either a link to the qual report or an attached PDF file for each CCB. Updated the affected CPN list to removed EOL'ed CPNS: ATECC608A-MAHLG-T, ATECC608A-MAHVL-T, ATECC608AMAHVM-T, ATECC508A-MAHPH-S, ATECC508A-MAHUW-T, ATECC608B-MAH5O-T, ATECC508AMAHKN-T, ATECC608B-MAHAF-S, ATECC508A-MAHKN-S, ATECC508A-MAH1A-T, ATECC608AMAH4K-T, ATECC608A-MAH3P-T, ATECC608A-MAH3Q-S, ATECC608A-MAH4W-T, ATECC608AMAHAC-S, ATECC608A-MAHD3-S, ATECC608A-MAHGA-T, ATECC608A-MAHGX-T, ATECC508AMAH2E-T, ATECC608A-MAH2B-T, ATECC608A-MAH2G-S, ATECC608A-MAHT2-B, ATECC508AMAH1C-S, ATECC508A MAH1Q-S, ATECC508A-MAH1Q-T, ATECC608A-MAH1G-S, ATECC608AMAH1G-T, ATECC608A-MAH1K-S, ATECC508A-MAHWW-S, ATECC508A-MAHWW-T, ATECC608B-MAHAK-S, ATECC608B-MAHPA-T, ATECC608B-MAHSB-T, ATECC608B-MAHSC-T,ATECC608A MAH2U-T, ATECC608A-MAH2V-S, ATECC608A-MAH2X-S, ATECC608A-MAH2Y-S, ATECC608A-MAH3J-T and ATECC608A-MAH1W-T.
Description of Change:Qualification of QMI519 as a new die attach material and CuPdAu as a new bond wire material for various products available in PLCC, QSOP, SOIC, SOIJ, SSOP, TSSOP, MQFP, TQFP, DFN, QFN, QFN-S, SQFN, TDFN, UDFN, UQFN, VDFN, VQFN, WQFN and TQFP packages assembled at MP3A, MTAI and MMT sites.Reason for Change:To improve manufacturability by qualifying QMI519 as a new die attach to standardize the use of PFAS free material and CuPdAu as a new bond wire material.September 03, 2025 (date code: 2536)
***UPDATE OF PCN109142***Description of Change: Qualification of UNIG as a new assembly site for various products available in Tube, Tray and Tape & Reel packing media.Reason for Change: To improve on-time delivery performance by qualifying UNIG as a new assembly site.Estimated First Ship Date: 30 June 2025 (date code: 2527)
PCN Status:Initial NotificationDescription of Change:Qualification of UNIG as a new assembly site for various products available in Tube, Tray and Tape & Reel packing media.Reason for Change:To improve on-time delivery performance by qualifying UNIG as a new assembly site.Change Implementation Status:In ProgressEstimated Qualification Completion Date:October 2024
Description of Change:Qualification of UNIG as a new assembly site for various products available in Tube, Tray and Tape & Reel packing media.Pre and Post Change Summary: see attachedmpacts to Data Sheet:NoneChange Impact:NoneReason for Change:To improve on-time delivery performance by qualifying UNIG as a new assembly site.Change Implementation Status:In ProgressEstimated Qualification Completion Date:June 2024
Statut du produit:
- https://futureelec.wufoo.com/forms/?formname=r8bzou01ws8brs&field12=NA&field16=fr&field2=DSPIC30F3012-20E/ML&field4=Microchip&field18=https://p1na.futureelectronics.com/fr/p/semiconductors--microcontrollers--16-bit-digital-signal-controller-dsc/dspic30f3012-20e-ml-microchip-9029167
- https://futureelec.wufoo.com/forms/?formname=r8bzou01ws8brs&field12=NA&field16=fr&field2=DSPIC30F3012-20E/ML&field4=Microchip&field18=https://p1na.futureelectronics.com/fr/p/semiconductors--microcontrollers--16-bit-digital-signal-controller-dsc/dspic30f3012-20e-ml-microchip-9029167
Microchip DSPIC30F3012-20E/ML - Caractéristiques techniques
| Family Name: | dsPIC30F |
| Core Processor: | dsPIC |
| Program Memory Type: | Flash |
| Flash Size (Bytes): | 24kB |
| RAM Size: | 2kB |
| Speed: | 20MHz |
| No of I/O Lines: | 12 |
| InterfaceType / Connectivity: | I2C/SPI/UART |
| Peripherals: | I2C/On-Chip-ADC/PWM/SPI/UART/Watchdog |
| Number Of Timers: | 3 |
| Supply Voltage: | 2.5V to 5.5V |
| Operating Temperature: | -40°C to +125°C |
| On-Chip ADC: | 8-chx12-bit |
| Watchdog Timers: | 1 |
| Style d'emballage : | QFN-44 |
| Méthode de montage : | Surface Mount |
Fonctionnalités et applications
The DSPIC30F3012-20E/ML is a high-performance digital signal controller with an operating voltage range of 2.5 to 5.5 V and having program memory of 24 kB, available in DIP-18 package.
Features:
- High-Performance Modified RISC CPU:
- Modified Harvard architecture.
- C compiler optimized instruction set architecture.
- 84 base instructions with flexible addressing modes.
- 24-bit wide instructions, 16-bit wide data path.
- 16 x 16-bit working register array.
- Up to 30 MIPs operation:
- DC to 40 MHz external clock input.
- Internal FRC input with PLL active (4x, 8x, 16x).
- 4 MHz-10 MHz oscillator input with PLL active (4x, 8x, 16x).
- 10 MHz - 20 MHz oscillator input in HS/2 or HS/3 with PLL active (4x, 8x, 16x).
- Peripheral and External interrupt sources.
- 8 user selectable priority levels for each interrupt.
- 4 processor exceptions and software traps.
- Primary and Alternate interrupt Vector Tables.
- DSP Engine Features:
- Modulo and Bit-Reversed Addressing modes.
- Two, 40-bit wide accumulators with optional saturation logic.
- 17-bit x 17-bit single cycle hardware fractional/ integer multiplier.
- Single cycle Multiply-Accumulate (MAC) operation.
- 40-stage Barrel Shifter.
- Dual data fetch.
Emballages disponibles
Qté d'emballage(s) :
45 par Tube
Style d'emballage :
QFN-44
Méthode de montage :
Surface Mount
