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  7. AS7C34096A-12TCN

Alliance Memory | AS7C34096A-12TCN

Référence fabricant

AS7C34096A-12TCN

AS7C34096A Series 4-Mbit (512 K x 8) 3.3 V 12 ns CMOS Static RAM - TSOP 11-44

Modèle ECAD:
Nom du fabricant: Alliance Memory
Emballage standard:
Product Variant Information section
Code de date:
Product Specification Section
Alliance Memory AS7C34096A-12TCN - Caractéristiques techniques
Attributes Table
Memory Density: 4Mb
Memory Organization: 512 K x 8
Supply Voltage-Nom: 3.3V
Access Time-Max: 12ns
Temperature Grade: Commercial
Style d'emballage :  TSOP II-44
Méthode de montage : Surface Mount
Fonctionnalités et applications
The AS7C34096A is a high-performance CMOS 4,194,304-bit Static Random Access Memory (SRAM) device organized as 524,288 words × 8 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired.

Equal address access and cycle times (tAA, tRC, tWC) of 10/12/15/20 ns with output enable access times (tOE) of 4/5/6/7 ns areideal for high-performance applications. The chip enable input CE permits easy memory expansion with multiple-bank memorysystems. When CE is high the device enters standby mode.

The device is guaranteed not to exceed 28.8mW power consumption in CMOS standby mode. A write cycle is accomplished by asserting write enable (WE) and chip enable (CE). Data on the input pins I/O1–I/O8 is written on the rising edge of WE (write cycle 1) or CE (write cycle 2). To avoid bus contention, external devices should drive I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE).

A read cycle is accomplished by asserting output enable (OE) and chip enable (CE), with write enable (WE) high. The chipdrives I/O pins with the data word referenced by the input address. When either chip enable or output enable is inactive, or write enable is active, output drivers stay in high-impedance mode.

All chip inputs and outputs are TTL-compatible, and operation is from a single 3.3V supply voltage. This device is available as per industry standard 400-mil 36-pin SOJ and 44-pin TSOP 2 packages.

A 4MB 3.3V Fast Asynchronous Alliance product that has a 512K x8 configuration, with commercial temperature range (0°C to 70°C), and a 44-pin TSOP II package. The part supports 12 nanoseconds speeds and is RoHS compliant.
Pricing Section
Stock global :
0
États-Unis:
0
Sur commande :
0
Stock d'usine :Stock d'usine :
0
Délai d'usine :
8 Semaines
Commande minimale :
1350
Multiples de :
135
Total 
4 819,50 $
USD
Quantité
Prix unitaire
135+
$3.57
Product Variant Information section