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Manufacturer Part #

74AHC138PW,118

74AHC Series 5.5 V 3-to-8 Line Decoder/Demultiplexer Inverting - TSSOP-16

ECAD Model:
Mfr. Name: Nexperia
Standard Pkg:
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Product Specification Section
Nexperia 74AHC138PW,118 - Technical Attributes
Attributes Table
Logic Circuit: Decoder/Demux
Family: A/HC/T/U
No of Functions / Channels: 1
Supply Voltage-Nom: 2V to 5.5V
Power Dissipation: 0.5W
Propagation Delay: 6ns
Operating Temperature: -40°C to +125°C
Capacitance: 3pF
No of Inputs: 3
No of Outputs: Eight
High Level Output Current: -8mA
Low Level Output Current: 8mA
No of Pins: 16
Quiescent Current: 4µA
Moisture Sensitivity Level: 1
Package Style:  TSSOP-16
Mounting Method: Surface Mount
Features & Applications

The 74AHC138PW are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A.

The 74AHC138 is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted address inputs (A0, A1 and A2) and, when enabled, provides eight mutually exclusive outputs (Y0 to Y7) that are LOW when selected.

Features:

  • Balanced propagation delays
  • All inputs have Schmitt-trigger action
  • Demultiplexing capability
  • Multiple input enable for easy expansion
  • Ideal for memory chip select decoding
  • Inputs accepts voltages higher than VCC
  • For 74AHC138 only: operates with CMOS input levels
  • For 74AHCT138 only: operates with TTL input levels
  • ESD protection:
    • HBM JESD22-A114E exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V
    • CDM JESD22-C101C exceeds 1000 V
  • Multiple package options
  • Specified from -40 Cel to +85 Cel and from -40 Cel to +125 Cel

 

 

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Minimum Order:
7500
Multiple Of:
2500
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Total
$1,875.00
USD
Quantity
Unit Price
2,500
$0.255
5,000+
$0.25
Product Variant Information section