onsemi | MC100EP40DTR2G

The MC100EP40 is a three−state phase−frequency detector intended for phase−locked loop applications which require a minimum amount of phase and frequency difference at lock. Advanced design significantly reduces the dead zone of the detector. For proper operation, the input edge rate of the R and V inputs should be less than 5 ns. The device is designed to work with a 3.3 V / 5 V power supply.

The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 µF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. Special considerations are required for differential inputs under No Signal conditions to prevent instability.

Key Features:

• Maximum Frequency > 2 GHz Typical
• Fully Differential
• Advanced High Band Output Swing of 400 mV
• Theoretical Gain = 1.11
• Trise 97 ps Typical, Ffall 70 ps Typical
• The 100 Series Contains Temperature Compensation
• PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V
• NECL Mode Operating Range: VCC = 0 V with VEE = −3.0 V to −5.5 V
• 50 Ω Internal Termination Resistor
• These are Pb−Free Devices

Learn more about the MC100EP4x family of Timing Solutions