Microchip | DSPIC33EP512MU810-I/BG

The DSPIC33EP512MU810-I/BG is a High Performance, 16 bit Digital Signal Controller with 52 KB RAM and 536 KB Flash, available in TFBGA-100 package.

Features:

• High-Performance MCU CPU:
  • Modified Harvard architecture
  • C compiler optimized instruction set
  • 16-bit Wide Data Path
  • 24-bit Wide Instructions
  • Linear Program Memory Addressing up to 4 M Instruction Words
  • Linear Data Memory Addressing up to 64 Kbytes
• Additional High-Performance DSC CPU Features:
  • 11 Additional Instructions
  • Two 40-bit Accumulators with Rounding and Saturation Options
  • Single-Cycle shifts for up to 40-bit Data
  • 16x16 Fractional Multiply/Divide Operations
• Direct Memory Access:
  • 15-Channel Hardware DMA
  • Up to 4 Kbytes Dual Ported DMA Buffer Area to store data transferred via DMA
  • Most Peripherals Support DMA
• Interrupt Controller:
  • 13-Cycle Fixed Latency or 9- to 13-Cycle Variable Latency
  • Up to 116 Available Interrupt Sources
  • Up to Five External Interrupts
• Digital I/O:
  • Peripheral Pin Select (PPS) Functionality
  • Wake-up/Interrupt-on-Change for up to 122 pins
  • Output Pins can drive from 3.0 V to 3.6 V
• On-Chip Flash and SRAM:
  • Flash Program Memory (up to 512 Kbytes)
  • Flash Auxiliary Memory (up to 24 Kbytes)
  • Data SRAM (up to 52 Kbytes)
• System Management:
  • Flexible Clock Options
  • Programmable Power-up Timer
  • Oscillator Start-up Timer
  • Watchdog Timer with its own RC Oscillator
• CMOS Flash Technology:
  • Low-Power, High-Speed Flash Technology
  • Fully Static Design
  • 3.3 V (±10%) Operating Voltage