Manufacturer Part #
CY2305 Series Single PLL 3.3 V 133 MHz Zero Delay Clock Buffer SMT - SOIC-8
|Standard Pkg:|| |
Product Variant Information section
97 per Tube
Cypress CY2305SXC-1H - Product Specification
Description of Change: This notification is to inform customers that Cypress will be standardizing its Full Box Quantity to a sellable quantity in the market where it will be able to round the orders in increment of this full box quantity. It may be recalled that Cypress had implemented Manufacturing Label and Packing Configuration Standardization via Product Information Notification PIN195102 in December 2019. As part of the Cypress integration into Infineon Shipping Standard, Cypress will be adjusting Minimum Order Quantity (MOQ), Order Increment (OI) to align them with new Full Box Quantity for select parts shipped in trays and tubes.
Addendum to PIN195102 - Manufacturing Label and Packing Configuration Standardization Description of Change: The purpose of this addendum is to correct the date from January 20, 2019 to January 20, 2020, in the "3rd paragraph in the 'Description of Change' section. This notification is to inform customers that Cypress will be standardizing its manufacturing labels and tray/tube packing configuration. It may be recalled that the Cypress entity consolidation (following the merger with Spansion Corp) was announced via Product Information Notification PIN174801 in November 2017. As the next phase of the entity consolidation process, Cypress will be adapting a new manufacturing label format for all products and revising shipping configurations for select product shipped in trays and tubes.
Cypress CY2305SXC-1H - Technical Attributes
|Type:||Zero Delay Buffer|
|Clock Input Frequency - Max:||133MHz|
|Clock Output Frequency - Max:||133MHz|
|Mounting Method:||Surface Mount|
$Features & Applications
The CY2309 is a low-cost 3.3V zero delay buffer designed to distribute high-speed clocks and is available in a 16-pin SOIC or TSSOP package. The CY2305 is an 8-pin version of the CY2309. It accepts one reference input, and drives out five low-skew clocks. The -1H versions of each device operate at up to 100-/133 MHz frequencies, and have higher drive than the -1 devices. All parts have on-chip PLLs which lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. The CY2309 has two banks of four outputs each, which can be controlled by the Select inputs as shown in the “Select Input Decoding” table on page 3. If all output clocks are not required, BankB can be three-stated. The select inputs also allow the input clock to be directly applied to the outputs for chip and system testing purposes.
The CY2305 and CY2309 PLLs enter a power down mode when there are no rising edges on the REF input. In this state, the outputs are three-stated and the PLL is turned off, resulting in less than 25.0 μA current draw for these parts.
Please see datasheets for additional information.The CY2305SXC-1H is a low-Cost 3.3V Zero Delay Buffer, 8-pin 150-mil SOIC package, commercial temperature, lead free.
97 per Tube