How a New 1kW PFC Design Uses GaN HEMTs to Achieve System Efficiency of 99%
By David Woodcock
EMEA Centre of Excellence for Power Electronics
Read this to find out about:
- The low-loss switching characteristics of GaN power transistors
- The need to consider carefully the power-conversion topology when implementing a GaN-based design
- The operation and performance of the GaNdalf 1kW PFC reference design board
The potential for devices made from the wide bandgap material, Gallium Nitride (GaN), to produce improvements in the efficiency and power density of power-supply circuits has been clear for several years. This has induced power-system designers to introduce GaN High Electron-Mobility Transistors (HEMTs) into high-voltage systems in increasing numbers in recent months.
Wider adoption of GaN technology helps to put downward pressure on unit prices for packaged parts, and to widen the range of products from which designers can choose, creating a virtuous circle supporting increased usage of the technology. At the same time, the reliability of available GaN parts is improving, a trend supported by vendors’ active efforts to achieve automotive qualification for GaN products. Once this is generally achieved, overall confidence in this new technology should grow.
GaN HEMTs are notable for their negligible losses when switching at relatively high voltages and at high speed. This means that they promise the ability to realize smaller power-supply designs which can operate more efficiently with less elaborate cooling systems than designs using even today’s most advanced silicon superjunction MOSFETs.
To show the scope for using GaN HEMTs in today’s power designs, Future Electronics, in close collaboration with Microchip and Panasonic, has developed a 1kW Power Factor Correction (PFC) board using the bridgeless totem pole topology. This article describes the advantages, in terms of efficiency and component count, which can be achieved by implementing a hard-switched PFC circuit using X-GaN™ HEMTs from Panasonic.
The Design Requirement
Future Electronics, together with Microchip and Panasonic, embarked on the development of a PFC design with the goal of discovering the scope for making efficiency gains over a conventional PFC system based on the use of superjunction MOSFETs, with a circuit that used the minimal number of switches and magnetic components.
The PFC design was intended to be broadly applicable to industrial use cases. It aimed to support a maximum load of 1kW, and to achieve a power factor higher than 0.9 across the load range, and total harmonic distortion below 10% at full load.
The best existing superjunction MOSFET-based designs achieve peak efficiency of around 98%. The target for the Future Electronics project was to achieve efficiency of 99%, thus halving the power losses in the PFC circuit.
A Crucial Decision: Topology
When evaluating the scope for the use of wide bandgap GaN or silicon carbide (SiC) semiconductor devices, it is tempting, but unhelpful, to start by evaluating the effect of replacing silicon MOSFETs in an existing design with the closest equivalent wide bandgap part. In many cases, this approach will fail to take full advantage of the superior properties of a GaN or SiC FET, while saddling the design’s bill-of-materials (BoM) with the extra unit cost of the wide bandgap part.
Fig. 1: typical PFC circuit incorporating a diode bridge to rectify the AC input
In the case of a 1kW PFC circuit, the use of GaN HEMTs gave Future Electronics the freedom to employ a topology which is hard to implement with silicon MOSFETs. In a traditional PFC circuit using silicon MOSFETs, rectification involves passing current through a diode bridge (see Figure 1). The drawback of this topology is that conduction losses incurred at the diodes seriously impair system efficiency. A bridgeless topology, in which no input rectification stage is applied to the AC mains supply, eliminates these losses.
A typical bridgeless PFC topology in use today with silicon superjunction MOSFETs is shown in Figure 2. It includes silicon diodes, connected between the negative output and the AC input, to reduce the otherwise very high level of common-mode noise. Because silicon MOSFETs suffer from relatively high losses when hard-switched, this topology usually implements soft switching (switching at low or zero voltage). But this calls for a two-stage interleaved implementation, using two sets of switches and two boost inductors.
Fig. 2: bridgeless PFC topology using silicon superjunction MOSFETs
To achieve optimal efficiency, SiC diodes are used in each of the two switching cells for the synchronous switch (with duty cycle 1-D), while the active switch is usually a superjunction MOSFET tailored for PFC operation. High-performance SiC diodes for this function include the MSC series from Microchip, the SCS2 series from ROHM Semiconductor, the STPS series from STMicroelectronics or the LFUSCD series from Littelfuse. Options for the superjunction MOSFET have, until recently, been limited to a small number of suppliers. Newly released products from additional suppliers, however, are now reaching the market. For instance, MOSFETs in the fourth-generation E series from Vishay would be suitable in this case.
This interleaved bridgeless design for PFC has been shown to reach peak efficiencies as high as 98%. Although this level of efficiency is relatively high, there is still potential for improvement. But this has proved difficult for silicon MOSFETs, due to their inherently high switching losses at high voltage, and their reverse-recovery losses attributable to the body diode.
Fig. 3: reverse recovery measurements of a GaN HEMT and a silicon superjunction MOSFET
This creates scope for efficiency gains through deployment of GaN HEMTs, the structure of which includes no body diode – the source of the reverse-recovery charge found in silicon superjunction MOSFETs (see Figure 3). Featuring lower output capacitance as well, GaN HEMTs offer a way to reduce the switching losses in a bridgeless PFC circuit.
Crucially, the absence of reverse-recovery losses associated with GaN HEMTs and their relatively low switching losses at high voltage enable the use of a totem pole bridgeless topology in place of the interleaved topology. This reduces the number of switches and magnetic components required (see Figure 4). Furthermore, the potential to switch at high voltage efficiently with GaN HEMTs supports efficient operation in Continuous Conduction Mode (CCM). CCM is preferable at higher loads, because input filtering requirements are reduced compared to those of a soft-switching Discontinuous Conduction Mode (DCM) circuit.
Fig. 4: the bridgeless totem pole PFC topology
As Figure 4 shows, this single-stage circuit is simpler than the interleaved topology shown in Figure 2. The bridgeless totem pole requires only one inductor, and operates in CCM. Its input ripple current is therefore lower than that of the interleaved bridgeless topology. The design, then, benefits from reduced component count and potentially a smaller board footprint.
This bridgeless totem pole PFC topology using Panasonic X-GaN HEMTs is the basis of Future Electronics’ GaNdalf PFC board.
Fig. 5: operation of the bridgeless totem pole PFC circuit in the AC mains positive half-cycle
Operation of The Bridgeless Totem Pole PFC Circuit
The basic operation of Future Electronics’ GaNdalf bridgeless totem pole circuit is illustrated in Figures 5 and 6. They show the current path through the circuit during the switching cycles when operating in the positive and negative AC mains voltage half-cycles. GaN1 and GaN2, Panasonic PGA26E07BA HEMTs, operate at a nominal PWM frequency of 65kHz. S1 and S2 are the silicon MOSFETs used to synchronously rectify the AC cycle.
Fig. 6: operation of the bridgeless totem pole PFC circuit in the AC mains negative half-cycle
In the positive half-cycle, GaN2 is the active switch which allows current from the mains input to increase through the boost inductor for duty cycle D (determined by the load level and the instantaneous AC voltage). GaN1 is the synchronous switch which allows current to flow from the boost inductor to the output capacitor during duty cycle 1-D. Switch S2 is on throughout the positive half-cycle and S1 remains off.
Conversely, during the negative half-cycle GaN1 is the active switch with duty cycle D, and GaN2 is the synchronous switch with duty cycle 1-D. S1 is on throughout the negative half-cycle and S2 remains off.
Dead-time of a short duration is added at the change of switch state between the high or low GaN HEMT and the MOSFETs, to avoid any short condition.
In the GaNdalf board, digital control of the PFC circuit is implemented via a dual-core Microchip dsPIC33CH digital signal controller. Digital control methods tend to be preferred for the bridgeless totem pole topology. Since the AC input is not rectified, operation changes every half-cycle, as the active switch becomes the synchronous switch and vice versa. At the AC zero-crossover point, this abrupt change in operation gives rise to the risk of large current spikes if the timing is wrong. This leads to the need to stop switching in the zero-crossover region.
Several other conditions can also give rise to current spikes: these need to be monitored, and reactive control operations applied. The sequential and discontinuous nature of this control scheme lends itself to digital control methods, and the bridgeless totem pole topology is very well supported in software provided by Microchip with its dsPIC products.
Measured Performance: High Efficiency, Low Heat Dissipation
The GaNdalf reference board designed by Future Electronics, in collaboration with Microchip and Panasonic, has been produced for evaluation by customers (see Figure 7). Measured performance shows that a PFC design based on GaN HEMTs can produce a marked improvement in performance compared to systems that use silicon superjunction MOSFETs.
Fig. 7: the Future Electronics GaNdalf 1kW PFC reference design board
The specifications of the board are:
- AC input-voltage range: 85Vrms to 265Vrms
- 400V DC output voltage
- 1kW maximum load
- Switching frequency:
- 68kHz when load >250W at 230V AC or >200W at 110V AC
- 140kHz during start-up and when load ≤250W at 230V AC or ≤200W at 110V AC
- 99% efficiency
- <10% total harmonic distortion
- >0.9 power factor
At 65kHz, the Panasonic X-GaN HEMTs operate at a moderate temperature below 100°C with no forced-air cooling.
The Future Electronics GaNdalf board is intended to be close to production-ready for industrial customers implementing a 1kW PFC circuit. It provides a template for system designers, enabling them to rapidly evaluate the characteristics of GaN power transistors in real-world applications, and to implement an ideal bridgeless totem pole PFC circuit quickly, using off-the-shelf components which are readily available to buy today.
And its modular design – the GaN half-bridge circuit is supplied as a card module which plugs into the baseboard – means that users can easily and quickly upgrade the system with new half-bridge cards introduced by Future Electronics as new GaN HEMTs are released to the market.