Manufacturer Part #
RC32504A000GNK#BB0
IC FREQ TRANS 24VFQFPN
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| Mfr. Name: | Renesas | ||||||||||
| Standard Pkg: | Product Variant Information section Available PackagingPackage Qty:490 per Reel | ||||||||||
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Renesas RC32504A000GNK#BB0 - Product Specification
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Description of Change: This notice is to inform our customers of a DPLL lock issue during device boot. During initial startup, the affected devices may fail to lock its DPLL if they cannot detect a valid VCO clock reference. The likelihood of this detection failure varies with voltage and temperature conditions. This is only seen during initial boot; normal operation is unaffected.A DPLL lock failure can be identified by the following status bits: • dpll_lock_sts = 0 • osc_fallback = 1 Workaround Override the clock selection by setting sys_clk_sel (register 0x16D[7:6]) = 2. This forces the device to use the system clock divider and enables proper VCO clock reference operation. There are two methods to apply this fix. 1. Use the serial interface (I2C or SPI) to write the register setting during device initialization. 2. Program the register setting into the device's OTP to automatically apply the workaround on every start. Contact Renesas for assistance with setting up this configuration. This is a workaround only. There is no change to the existing product.Reason for Change: During boot, the device fails to correctly select the system clock divider and instead defaults to the RC oscillator circuit, preventing the DPLL from locking.Effective Date: 12/11/2025
Part Status:
Available Packaging
Package Qty:
490 per Reel