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Manufacturer Part #
PIC32MZ2064DAG176T-I/2J
Microchip PIC32MZ2064DAG176T-I/2J - Product Specification
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Description of Change: This revision includes the following major changes:1) General 1.1) Throughout the document, References to both ?Master? and ?Slave? were revised to read ?Host? and ?Client? where applicable 1.2) Updated ?Operating Conditions? to reflect correct temperature ranges2) 2.0 ?Guidelines for Getting Started with 32-bit Microcontrollers? - Updated 2.9.2 ?5V Tolerant Input Pins?, correcting VDD to VDDIO, and updated VDDIO specifications in the text3) 8.0 ?Oscillator Configuration? 3.1) Removed erroneous information within parenthesis on Note 6 for Table 8-1: ?System and Peripheral clock Distribution? 3.2) Updated Register 8-4: ?REFOxCON: Reference Oscillator Control Register (?x? = 1-5)? to properly display x=1-5, and added a note number 44) 17.0 ?Deadman Timer (DMT)? - Updated to note for Register 17-1: ?DMTCON: Deadman Timer Control Register?5) 21.0 ?Serial Peripheral Interface (SPI) and Inter-ICSound (I2S)? - Updated FIGURE 21-1: ?SPI/I2S Module Block Diagram? to read ?SPI Select? instead of ?Slave Select?6) 25.0 ?Parallel HOST Port (PMP)? 6.1) Added a new note to the IRQM bit of Register 25-2: ?PMMODE: Parallel Port Mode Register? 6.2) Added a new note to the IBOV bit of Register 25-7: ?PMSTAT: Parallel Port Status Register (Client modes only)?7) 35.0 ?Charge Time Measurement Unit (CTMU)? - Added AN5 to AN39 to the first bulleted item on page 5858) 36.0 ?Graphics LCD (GLCD) Controller? - Corrected typographical errors in bitfield 5-0 for Register 36-2: ?GLCDCLKCON: Graphics LCD Controller Clock Control Register?9) 38.0 ?DDR2 SDRAM Controller? 9.1) Added a note to bit 28 of Register 38-24: ?DDRSCLSTART: DDL SELF CALIBRATION LOGIC START REGISTER? 9.2) Corrected a typographical error is the DLYSTVAL bitfield of Register 38-29: ?DDRPHYDLLR: DDR PHY DLL Recalibrate Register?10) 40.0 ?Power-Saving Features? 10.1) Updated FIGURE 40-1: ?XLP Device Block Diagram? to properly display VDDCORE 10.2) A new note was added to 40.4 ?Peripheral Module Disable?11) 41.0 ?Special Features? 11.1) Added a new note to the FDMTEN bitfield for Register 41-4: ?DEVCFG1/ADEVCFG1: Device Configuration Word 1? 11.2) Corrected typographical errors in 41.4 ?On-Chip Voltage Regulator?12) 44.0 ?Electrical Characteristics? 12.1) Updated Table 44-24: ?System Timing Requirements? with new conditions for the Reference Clock frequency 12.2) Updated Table 44-26: ?MPLL Clock Timing Requirements? with a new maximum value for the MP12 Parameter 12.3) Updated the characteristics for Table 44-55: ?GLCD Controller Timing Specifications?with the addition of GLCD pin verbiage 12.4) Updated TABLE 44-56: ?Internal DDR2 SDRAM Timing Specifications? with a correction to note 513) 46.0 ?Packaging Information? - Updated the Descriptions for the 169-Ball Low Profile Ball Grid Array14) ?Product Identification System? - Updated the Package description for the 169 Lead LFBGAReason for Change: To Improve Productivity Date Document Changes Effective: 02 July 2021NOTE: Please be advised that this is a change to the document only the product has not been changed.
Microchip has released a new Product Documents for the PIC32MZ Graphics (DA) Family Silicon Errata of devices.Notification Status: FinalDescription of Change: The I2C, SPI, and I2S standards use the terminology "Master? and "Slave". The equivalent Microchip terminology used in this document is "Host" and "Client" respectively.The following Silicon Issues were updated:? 70. Module: ?USB?The following Data Sheet Clarifications were added:? 1. Module: ?Bitfields added to the SDHCCAP Register?? 2. Module: ?MPLL Maximum Output Frequency?? 3. Module: ?EBI Timing Requirements?? 4. Module: ?INTERNAL DDR2 SDRAM TIMING SPECIFICATIONS?Impacts to Data Sheet: NoneReason for Change: To Improve ProductivityChange Implementation Status: CompleteDate Document Changes Effective: 01 Jun 2021NOTE: Please be advised that this is a change to the document only the product has not been changed.
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