ATmega4809 Xplained Pro 8-Bit Microcontroller Embedded Evaluation Board
Description of Change:1) Entire document: Added support for ATmega808/809/1608/1609, Added support for 40-pin PDIP, Editorial updates and Renamed document type from manual to family data sheet on the2) Features: Updated data retention information and Extended speed grade information on the Features section3) Memories: Added oscillator calibration (OSCCALnnxn) registers; SIGROW- Updated description to clarify that information is stored in fuse bytes, not in volatile registers; FUSE - Clarifying thatreserved bits within a fuse byte must be written to ‘0', Removed non-recommended BOD levels in BODCFG, Updating access for LOCKBIT from R/W to R, Removed misleading reset values; Updated Memory Section Access from CPU and UPDI on Locked Device section.4) AVR CPU: Removed redundant information5) Clock Controller (CLKCTRL): Added OSC20MCALIBA register 6) Event System (EVSYS): STROBE/STROBEA renamed to STROBEx; Event Generators - Added Window Compare Match for ADC, Updated TCB event generator description; Event Users- Updated table; STROBEn - Updated access from R/W to W; Updated generator names in CHANNEL ; Updated table in USER 7) PORTMUX - Port Multiplexer - Added explicit information for EVSYSROUTEA register8) BOD - Brown-out Detector - Removed non-recommended BOD levels from CTRLB9) TCA - 16-bit Timer/Counter Type A: Single Slope PWM Generation - Revised figure and description; Dual Slope PWM - Revised figure and description; Events - Revised description andadded table10) TCB - 16-bit Timer/Counter Type B : Updated block diagram for clock sources; Mode figures legend use improved; Input Capture Pulse-Width Measurement mode figure corrected; 8-bit PWMmode pseudo-code replaced by figure; Added output configuration table11) Real-Time Counter (RTC): Clarified that first PIT interrupt and RTC count tick will be unknown; Added Debug Operation section; Updated reset values for PER and CMP register; Updated access for PITINTFLAGS register12) USART - Universal Synchronous and Asynchronous Receiver and Transmitter: Structural changes; General content improvements13) Serial Peripheral Interface (SPI): Added INTCTRL register14) Two-Wire Interface (TWI): Removed misleading internal information from Overview section; Cleaned up Dual Control information; Clarified APIEN description in SCTRLA15) CCL - Configurable Custom Logic: Register summary updated- Number n of LUTs and according registers (LUTnCTRLA, LUTnCTRLB, LUTnCTRLC, TRUTHn); Update of terms and descriptions: - Block Diagram section - CCL Input Selection MUX section - Sequencer Logic - Events - Filter - Association LUT-Sequencer16) Analog-to-Digital Converter (ADC): Updated ADC Timing Diagrams - Single Conversion - Free-Running Conversion; Added information in the Events section17) Unified Program and Debug Interface (UPDI): General content improvements; Updated Access for UROWWRITE in ASI_KEY_STATUS registerReason for Change: To Improve ManufacturabilityDate Document Changes Effective: 29 Mar 2019.NOTE: Please be advised that this is a change to the document only the product has not been changed.
Description of Change:1) Updated the data sheet to Microchip style2) New Microchip document number. Previous version was Atmel data sheet Rev.2545UReason for Change: To Improve ManufacturabilityDate Document Changes Effective: 13 Dec 2018NOTE: Please be advised that this is a change to the document only the product has not been changed.
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