Manufacturer Part #
DSPIC33EP256GP504-I/ML
dsPIC33EP Series 32 kB RAM 256 kB Flash 16-Bit Digital Signal Controller -QFN-44
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| Mfr. Name: | Microchip | ||||||||||
| Standard Pkg: | Product Variant Information section Available PackagingPackage Qty:45 per Tube Package Style:QFN-44 Mounting Method:Surface Mount | ||||||||||
| Date Code: | 1948 | ||||||||||
Product Specification
Shipping Information:
ECCN:
PCN Information:
PCN Status: Final notificationPCN Type: Manufacturing ChangeDescription of Change: Qualification of palladium coated copper with gold flash (CuPdAu) bond wire for selected products available in 44L QFN (8x8x0.9mm), 28L QFN-S (6x6x0.9mm) and 28L QFN (6x6x0.9mm) packages at MTAI assembly site.Pre Change: Using gold (Au) bond wirePost Change:Using palladium coated copper with gold flash (CuPdAu) bond wireImpacts to Data Sheet: NoneChange Impact:None Reason for Change:To improve manufacturability by qualifying palladium coated copper with gold flash (CuPdAu) bond wire at MTAI assembly site.Change Implementation Status:In Progress Estimated First Ship Date:July 24, 2020 (date code: 2030)NOTE: Please be advised that after the estimated first ship date customers may receive pre and post change parts.
Microchip has released a new Product Documents for the dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X Errata of devices.Description of Change: 1) Updated all Affected Families and Silicon Revision tables to a new format 2) Removed silicon issue 29 (JTAG) since it no longer applies.3) Removed all data sheet clarifications because the issues were corrected in the latest data sheet revision.Impacts to Data Sheet: NoneReason for Change: To Improve ProductivityDate Document Changes Effective: 23 Jun 2020NOTE: Please be advised that this is a change to the document only the product has not been change
Microchip has released a new Product Documents for the dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, and PIC24EPXXXGP/MC20X Data Sheet of devices.Description of Change: This revision includes minor typographical and formatting changes throughout the text. Other major changes are referenced by their respective section in Table A-7.1) Cover Sectiona) Removes Planned from the Qualification and Class B Support section.b) Adds UQFN package to Table 1 and Table 2.c) Adds two 36-pin UQFN pin diagrams.d) Changes the RD8 pin to non-5V tolerant.e) Adds the Referenced Sources section.2) Section 2.7 Oscillator Value Conditions on Device Start-upa) Corrects the oscillator source frequency.3) Section 3.0 CPUa) Changes to Note 1 here and every chapter throughout document.4) Section 4.0 Memory Organizationa) Changes to Figure 4-11 and Figure 4-16.b) Changes to Table 4-35.5) Section 5.0 Flash Program Memorya) Changes to Register 5-1.6) Section 7.0 Interrupt Controllera) Changes to Table 7-1.7) Section 9.0 Oscillator Configurationa) Changes to Table 9-1.8) Section 10.0 Power-Saving Featuresa) Replaces Example 10-1 and adds Example 10-2.b) Changes to Section 10.2.1 Sleep Mode.9) Section 11.0 I/O Portsa) Changes to Section 11.2 Configuring Analog and Digital Port Pins.10) Section 13.0 Timer2/3 and Timer4/5a) Changes to Register 13-1 and Register 13-2.11) Section 14.0 Input Capturea) Changes to Register 14-2.12) Section 16.0 High-Speed PWM Module (dsPIC33EPXXXMC20X/ 50X and PIC24EPXXXMC20X Devices Only)a) Changes to Note in Section 16.0 High-Speed PWM Module (dsPIC33EPXXXMC20X/50X and PIC24EPXXXMC20X Devices Only).b) Changes to Register 16-7 and Register 16-13.13) Section 23.0 10-Bit/12-Bit Analog-to-Digital Converter (ADC)a) Changes to Register 23-8.14) Section 25.0 Op Amp/ Comparator Modulea) Changes to Figure 25-1.b) Changes to Section 25.1 Op Amp Application Considerations.c) Changes to Register 25-2 and Register 25-7.15) Section 27.0 Special Featuresa) Changes to Table 27-2.16) Section 30.0 Electrical Characteristicsa) Changes to Table 30-3, Table 30-6, Table 30-11, Table 30-14 and Table 30-53.17) Section 31.0 High Temperature Electrical Characteristicsa) Changes to Table 31-2.b) Adds Table 31-9, Table 31-10 and Table 31-13.18) Section 32.0 DC and AC Device Characteristics Graphsa) Replaces Figure 32-10.19) Section 33.0 Packaging Informationa) Adds package marking diagram in Section 33.1 Package Marking Information.b) Adds packaging diagrams to Section 33.2 Package Details.20) Product Identification Systema) Adds M5 packaging description Reason for Change: To Improve Productivity Date Document Changes Effective: 18 June 2020
Microchip has released a new Product Documents for the dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X Errata of devices.Description of Change: Updated silicon issue 12 (Flash).Reason for Change: To Improve ProductivityDate Document Changes Effective: 30 Oct 2019NOTE: Please be advised that this is a change to the document only the product has not been changed.
Description of Change:Qualification of palladium coated copper with gold flash (CuPdAu) bond wire in selected products of the 0.18um TSMC wafer technology available in 44L QFN (8x8x0.9mm) package at NSEB assembly site.Pre Change: Using gold (Au) bond wire.Post Change: Using palladium coated copper with gold flash (CuPdAu) bond wire.Reason for Change:To improve manufacturability by qualifying CuPdAu bond wire at NSEB assembly site.Estimated First Ship Date:September 15, 2019 (date code: 1938)
Description of Change:Qualification of MMT as an additional assembly site for selected products of 0.25um, 0.18um TSMC, 70nm SMIC, Vanguard,120K,130K, 150K, 160K, 165K, 200K and 290K wafer technologies in 44L, 28 QFN-S, 20L,16L and 28L QFN packages.Pre Change:Assembled at MTAI assembly site.Post Change:Assembled at MTAI or MMT assembly site.Reason for Change:To improve on-time delivery performance by qualifying MMT as an additional assembly site Estimated First Ship Date:June 24, 2018 (date code:1826)
Description of Change:Qualification of MMT as an additional assembly site for selected products of 0.25um, 0.18um TSMC, 70nm, SMIC, Vanguard,120K,130K, 150K, 160K, 165K, 200K and 290K wafer technologies available in 44L, 28L QFN-S, 20L,16L and 28L QFN packages..Pre Change: Assembled at MTAI assembly sitePost Change: Assembled at MTAI or MMT assembly siteReason for Change:To improve on-time delivery performance by qualifying MMT as an additional assembly site.Estimated Qualification Completion Date:April 2018
Description of Change:Qualification of MMT as an additional assembly site for selected products of 0.25um, 0.18um TSMC, 70nm, SMIC, Vanguard,120K,130K, 150K, 160K, 165K, 200K and 290K wafer technologies available in 44L, 28L QFN-S, 20L,16L and 28L QFN packages.Pre Change: Assembled at MTAI assembly sitePost Change: Assembled at MTAI or MMT assembly siteReason for Change:To improve on-time delivery performance by qualifying MMT as an additional assembly site.
Product Lifecycle:
-
ROHS Compliant -
Lead Free
Technical Attributes
| Family Name: | dsPIC33EP |
| Core Processor: | dsPIC |
| Program Memory Type: | Flash |
| Flash Size (Bytes): | 256kB |
| RAM Size: | 32kB |
| Speed: | 70MHz |
| No of I/O Lines: | 35 |
| InterfaceType / Connectivity: | CAN/IrDA/I2C/LIN/SPI/UART |
| Peripherals: | DMA/POR/PWM/Watchdog |
| Number Of Timers: | 5 |
| Supply Voltage: | 3V to 3.6V |
| Operating Temperature: | -40°C to +85°C |
| On-Chip ADC: | 9-chx10-bit |
| Watchdog Timers: | 1 |
| Package Style: | QFN-44 |
| Mounting Method: | Surface Mount |
Available Packaging
Package Qty:
45 per Tube
Package Style:
QFN-44
Mounting Method:
Surface Mount
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