Les commandes expédiées à l’extérieur des États-Unis seront en attente pendant que l’entreprise évalue les impacts tarifaires.Veuillez contacter votre vendeur pour obtenir de l’aide.
Livraison gratuite aux États-Unis continentaux à partir de 50 $ US. Des conditions s'appliquent
Référence fabricant
74HC273PW,118
74HC Series 6V Octal D-Type Flip-Flop w/ Reset Positive-Edge Trigger-TSSOP-20
| | |||||||||||
| | |||||||||||
| Nom du fabricant: | Nexperia | ||||||||||
| Emballage standard: | Product Variant Information section Emballages disponiblesQté d'emballage(s) :2500 par Reel Style d'emballage :TSSOP-20 Méthode de montage :Surface Mount | ||||||||||
| Code de date: | |||||||||||
Nexperia 74HC273PW,118 - Spécifications du produit
Informations de livraison:
ECCN:
Informations PCN:
Statut du produit:
- https://futureelec.wufoo.com/forms/?formname=r8bzou01ws8brs&field12=NA&field16=fr&field2=74HC273PW,118&field4=Nexperia&field18=https://p1na.futureelectronics.com/fr/p/semiconductors--logic--74-series--a-hc-t/74hc273pw-118-nexperia-8756181
- https://futureelec.wufoo.com/forms/?formname=r8bzou01ws8brs&field12=NA&field16=fr&field2=74HC273PW,118&field4=Nexperia&field18=https://p1na.futureelectronics.com/fr/p/semiconductors--logic--74-series--a-hc-t/74hc273pw-118-nexperia-8756181
Nexperia 74HC273PW,118 - Caractéristiques techniques
| Logic Circuit: | D-Type, Flip Flop IC |
| Family: | A/HC/T/U |
| No of Functions / Channels: | 8 |
| Supply Voltage-Nom: | 5V |
| Supply Current: | 8µA |
| Power Dissipation: | 500mW |
| Propagation Delay: | 150ns |
| Operating Temperature: | -40°C to +125°C |
| Capacitance: | 3.5pF |
| No of Inputs: | 8 |
| No of Outputs: | Eight |
| High Level Output Current: | -5.2mA |
| Low Level Output Current: | 5.2mA |
| No of Pins: | 20 |
| Moisture Sensitivity Level: | 1 |
| Style d'emballage : | TSSOP-20 |
| Méthode de montage : | Surface Mount |
Fonctionnalités et applications
The 74HC273PW is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL).
The 74HC273 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common clock (pin CP) and master reset (pin MR) inputs load and reset (clear) all flip-flops simultaneously. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop.
Features:
- Ideal buffer for MOS microprocessor or memory
- Common clock and master reset
- Eight positive edge-triggered D-type flip-flops
- Complies with JEDEC standard no. 7A
- ESD protection:
- HBM EIA/JESD22-A114-C exceeds 2000 V
- MM EIA/JESD22-A115-A exceeds 200 V
- Specified from -40 Cel to +85Cel and from -40 Cel to +125 Cel
View the 74HC273 family of Flip-Flops
Emballages disponibles
Qté d'emballage(s) :
2500 par Reel
Style d'emballage :
TSSOP-20
Méthode de montage :
Surface Mount
