Manufacturer Part #
PIC24HJ256GP610A-I/PF
PIC24 Series 16 kB RAM 256 kB Flash 16-Bit Microcontroller - TQFP-100
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| Mfr. Name: | Microchip | ||||||||||
| Standard Pkg: | Product Variant Information section Available PackagingPackage Qty:90 per Tray Package Style:TQFP-100 Mounting Method:Surface Mount | ||||||||||
| Date Code: | 2512 | ||||||||||
Microchip PIC24HJ256GP610A-I/PF - Product Specification
Shipping Information:
ECCN:
PCN Information:
*** Update for PCN 115312 ***Description of Change:Qualification of QMI519 as a new die attach material and CuPdAu as a new bond wire material for various products available in PLCC, QSOP, SOIC, SOIJ, SSOP, TSSOP, MQFP, TQFP, DFN, QFN, QFN-S, SQFN, TDFN, UDFN, UQFN, VDFN, VQFN, WQFN and TQFP packages assembled at MP3A, MTAI and MMT sites.Reason for Change:To improve manufacturability by qualifying QMI519 as a new die attach to standardize the use of PFAS free material and CuPdAu as a new bond wire material.Estimated First Ship Date:September 03, 2025 (date code: 2536)Revision History:July 22, 2025: Issued final notification.August 15, 2025: Re-issued the final notification to update the qualification report list, which now includes either a link to the qual report or an attached PDF file for each CCB. Updated the affected CPN list to removed EOL'ed CPNS: ATECC608A-MAHLG-T, ATECC608A-MAHVL-T, ATECC608A-MAHVM-T, ATECC508A-MAHPH-S, ATECC508A-MAHUW-T, ATECC608B MAH5O-T, ATECC508A-MAHKN-T, ATECC608B-MAHAF-S, ATECC508A-MAHKN-S, ATECC508A-MAH1A-T, ATECC608A-MAH4K-T, ATECC608A-MAH3P-T, ATECC608A MAH3Q-S, ATECC608A-MAH4W-T, ATECC608A-MAHAC-S, ATECC608A-MAHD3-S, ATECC608A-MAHGA-T, ATECC608A-MAHGX-T, ATECC508A-MAH2E-T, ATECC608A MAH2B-T, ATECC608A-MAH2G-S, ATECC608A-MAHT2-B, ATECC508A-MAH1C-S, ATECC508A-MAH1Q-S, ATECC508A-MAH1Q-T, ATECC608A-MAH1G-S, ATECC608A MAH1G-T, ATECC608A-MAH1K-S, ATECC508A-MAHWW-S, ATECC508A-MAHWW-T, ATECC608B-MAHAK-S, ATECC608B-MAHPA-T, ATECC608B-MAHSB-T, ATECC608B MAHSC-T, ATECC608A-MAH2U-T, ATECC608A-MAH2V-S, ATECC608A-MAH2X-S, ATECC608A-MAH2Y-S, ATECC608A-MAH3J-T and ATECC608A-MAH1W-T.September 18, 2025: Re-issued the final notification to add PFAS Elimination and Die Attach Explanation file and updated the affected CPN list to remove ATMEGA8535L-8JU, AT89LP6440-20JU, X34070T-H/ST, LX34050QPW-TR, LX3302AQPW-TR-EASY, LX3302AQPW-TR-C01, LX34311T-H/ST, LX34070AT-H/ST, LX34070-H/ST, LX34050QPW, LX3302AQPW-EASY, LX34070T-H/STVAO, LX3302AQPW-TR, LX34050QPW-TR-VAO, LX3302AQPW-TR-GM, LX34311T-H/STVAO, LX34070AT-H/STVAO, LX34070-H/STVAO, LX3302AQPW and LX34050QPW-VAO.
*****FPCN114582 UPDATE/MATERIAL CHANGEQualification of QMI519 as a new die attach material and CuPdAu as a new bond wire material for various products available in PLCC, QSOP, SOIC, SOIJ, SSOP, TSSOP, MQFP, TQFP, DFN, QFN, QFN-S, SQFN, TDFN, UDFN, UQFN, VDFN, VQFN, WQFN and TQFP packages assembled at MP3A, MTAI and MMT sites.*Re-issued the final notification to update the qualification report list, which now includes either a link to the qual report or an attached PDF file for each CCB. Updated the affected CPN list to removed EOL'ed CPNS: ATECC608A-MAHLG-T, ATECC608A-MAHVL-T, ATECC608AMAHVM-T, ATECC508A-MAHPH-S, ATECC508A-MAHUW-T, ATECC608B-MAH5O-T, ATECC508AMAHKN-T, ATECC608B-MAHAF-S, ATECC508A-MAHKN-S, ATECC508A-MAH1A-T, ATECC608AMAH4K-T, ATECC608A-MAH3P-T, ATECC608A-MAH3Q-S, ATECC608A-MAH4W-T, ATECC608AMAHAC-S, ATECC608A-MAHD3-S, ATECC608A-MAHGA-T, ATECC608A-MAHGX-T, ATECC508AMAH2E-T, ATECC608A-MAH2B-T, ATECC608A-MAH2G-S, ATECC608A-MAHT2-B, ATECC508AMAH1C-S, ATECC508A MAH1Q-S, ATECC508A-MAH1Q-T, ATECC608A-MAH1G-S, ATECC608AMAH1G-T, ATECC608A-MAH1K-S, ATECC508A-MAHWW-S, ATECC508A-MAHWW-T, ATECC608B-MAHAK-S, ATECC608B-MAHPA-T, ATECC608B-MAHSB-T, ATECC608B-MAHSC-T,ATECC608A MAH2U-T, ATECC608A-MAH2V-S, ATECC608A-MAH2X-S, ATECC608A-MAH2Y-S, ATECC608A-MAH3J-T and ATECC608A-MAH1W-T.
Description of Change:Qualification of QMI519 as a new die attach material and CuPdAu as a new bond wire material for various products available in PLCC, QSOP, SOIC, SOIJ, SSOP, TSSOP, MQFP, TQFP, DFN, QFN, QFN-S, SQFN, TDFN, UDFN, UQFN, VDFN, VQFN, WQFN and TQFP packages assembled at MP3A, MTAI and MMT sites.Reason for Change:To improve manufacturability by qualifying QMI519 as a new die attach to standardize the use of PFAS free material and CuPdAu as a new bond wire material.September 03, 2025 (date code: 2536)
Revision History:August 10, 2023: Issued initial notification.June 05, 2025: Issued final notification. Attached the Qualification Report. Provided estimated first ship date to be on June 23, 2025. Updated the notification subject and description change.Note: The change described in this PCN does not alter Microchip's current regulatory compliance regarding the material content of the applicable product.Description of Change:Qualification of palladium coated copper with gold flash (CuPdAu) bond wire as new wire material for selected dsPIC33FJ6xx, PIC18F96J6xx, PIC18F97J6xx, PIC24FJ64Gxx, PIC24FJ128xx, PIC24FJ192xx, PIC24FJ256xx, PIC24FJ96Gxx, dsPIC33FJ2xx, PIC24HJ64Gxx, dsPIC33FJ1xx, PIC24HJ128xx, PIC24HJ256xx and dsPIC33FJ3xx device families available in 64L and 100L TQFP (14x14x1 mm) package.Reason for Change:To improve manufacturability by qualifying palladium coated copper with gold flash (CuPdAu) bond wire.
Description of Change: Qualification of new stamped lead frame with inner lead tape and non-brown oxide treatment (non-BOT) for selected products available in 100L and 64L TQFP (14x14x1mm) packages at MMT assembly site.Reason for Change:To improve productivity by qualifying new stamped lead frame with inner lead tape and non-brown oxide treatment (non-BOT).Revision History:August 9, 2024: Issued initial notification.November 20, 2024: Issued final notification. Attached the Qualification Report. Provided estimated first ship date to be on December 23, 2024.January 8, 2025: Re-issued to correct the pre and post table note from "66L" to "64L". Removed EOL CPNs PIC32MZ1024ECM100T-I/PF and PIC32MZ1024ECM100-I/PF from affected CPN list.
Description of Change:Qualification of new stamped lead frame with inner lead tape and non-brown oxide treatment (non-BOT) for selected products available in 100L and 64L TQFP (14x14x1mm) packages at MMT assembly site.Reason for Change:To improve productivity by qualifying new stamped lead frame with inner lead tape and non-brown oxide treatment (non-BOT).
Description of Change:Qualification of new stamped lead frame with inner lead tape and non-brown oxide treatment (non-BOT) for selected products available in 100L and 64L TQFP (14x14x1mm) packages at MMT assembly site.Reason for Change:To improve productivity by qualifying new stamped lead frame with inner lead tape and non-brown oxide treatment (non-BOT).
Description of Change:Qualification of palladium coated copper with gold flash (CuPdAu) bond wire asnew wire material for selected DSPIC33FJ128xxx, DSPIC33FJ256xxx, DSPIC33FJxxGSxxx,DSPIC33FJxxMxxx, PIC18F9xJxx and PIC24FJxxxGxxx device families available in 64L and 100L TQFP(14x14x1 mm) package.Reason for Change:To improve manufacturability by qualifying palladium coated copper with goldflash (CuPdAu) bond wire.
Part Status:
Microchip PIC24HJ256GP610A-I/PF - Technical Attributes
| Family Name: | PIC24H |
| Core Processor: | PIC |
| Program Memory Type: | Flash |
| Flash Size (Bytes): | 256kB |
| RAM Size: | 16kB |
| Speed: | 40MHz |
| No of I/O Lines: | 85 |
| InterfaceType / Connectivity: | CAN/I2C/SPI/UART |
| Peripherals: | CAN/I2C/On-Chip-ADC/PWM/SPI/UART/Watchdog |
| Number Of Timers: | 9 |
| Supply Voltage: | 3V to 3.6V |
| Operating Temperature: | -40°C to +85°C |
| On-Chip ADC: | 2(32-chx12-bit) |
| Watchdog Timers: | 1 |
| Package Style: | TQFP-100 |
| Mounting Method: | Surface Mount |
Features & Applications
The PIC24HJ256GP610A-I/PF is part of the PIC24H series family with 256 kB Flash as a 16-Bit Microcontroller. It can sustain standard temperature ranges from -40 to 125 and has 85 pins in a TQFN package.
Features:
- Operating Range:
- DC – 40 MIPS (40 MIPS @ 3.0-3.6 V, -40°C to +125°C)
- Industrial temperature range (-40°C to +85°C)
- Extended temperature range (-40°C to +125°C)
- High-Performance DSC CPU:
- Modified Harvard architecture
- C compiler optimized instruction set
- 16-bit wide data path
- 24-bit wide instructions
- Linear program memory addressing up to 4 M instruction words
- Linear data memory addressing up to 64 Kbytes
- 71 base instructions: mostly 1 word/1 cycle
- Sixteen 16-bit General Purpose Registers
- Flexible and powerful Indirect Addressing modes
- Software stack
- 16 x 16 multiply operations
- 32/16 and 16/16 divide operations
- Up to ±16-bit data shifts
- Direct Memory Access (DMA):
- 8-channel hardware DMA
- Most peripherals support DMA
- CMOS Flash Technology:
- Low-power, high-speed Flash technology
- Fully static design
- 3.3 V (±10%) operating voltage
- Industrial temperature
- Extended temperature
- Low-power consumption?
Available Packaging
Package Qty:
90 per Tray
Package Style:
TQFP-100
Mounting Method:
Surface Mount