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Manufacturer Part #
SAM9X75-I/4PB
ARM926 MPU MIPI/LVDS I-TEMP 240 TFBGA 11x11x1.217mm TRAY
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| Mfr. Name: | Microchip | ||||||||||
| Standard Pkg: | Product Variant Information section Available PackagingPackage Qty:176 per Std. Mfr. Pkg | ||||||||||
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Microchip SAM9X75-I/4PB - Product Specification
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Description of Change: Qualification of ASEK as an additional assembly site for SAM9X70-I/4PB, SAM9X70T-I/4PB, SAM9X70T-V/4PB, SAM9X70-V/4PB, SAM9X72-I/4PB, SAM9X72T-I/4PB, SAM9X72T-V/4PB, SAM9X72-V/4PB, SAM9X75-I/4PB, SAM9X75-I/4PB-SL3, SAM9X75T-I/4PB, SAM9X75T-I/4PB-SL3, SAM9X75T-V/4PB, SAM9X75T-V/4PB-SL3, SAM9X75-V/4PB and SAM9X75-V/4PB-SL3 catalog part numbers (CPN) available in 240L TFBGA (11x11x1.217mm) package.Reason for Change: To improve on-time delivery performance by qualifying ASEK as an additional assembly site.Estimated First Ship Date: 30 September 2025 (date code: 2540)
Microchip has released a new Document for the SAM9X7 Series Silicon Errata and Data Sheet Clarifications of devices. Notification Status: FinalDescription of Change:Throughout:– Extended scope to the following devices:• SAM9X70(T)-V/6GW• SAM9X72(T)-V/6GW• SAM9X75(T)-V/4PBVAO– Changed terminology from “silicon revision” to “device revision”• Updated Note• Added Boot failure on e.MMC memoriesImpacts to Data Sheet: NoneReason for Change: To Improve ProductivityChange Implementation Status: CompleteDate Document Changes Effective: 23 April 2025
Microchip has released a new Document for the SAM9X7 Series Silicon Errata and Data Sheet Clarifications of devices. Notification Status: FinalDescription of Change:Extended scope to SAM9X75(T)-V/6GW, SAM9X75D5M(T)-V/4TB and SAM9X75D5M(T)-I/4TB devicesImpacts to Data Sheet: NoneReason for Change: To improve productivityChange Implementation Status: CompleteDate Document Changes Effective: 19 Dec 2024
Microchip has released a new Datasheet for the SAM9X7 Series Data Sheet of devices. Description of Change:General Added content related to SAM9X7 Series fine pitch package devices (SAM9X75(T)-V/6GW) Added content related to Software License Level (SLx) Data sheet format reworkedOrdering Information: Updated ordering codesProduct Identification System: Updated ordering codesBoot Strategies: Added Software Considerations, Updated Hardware ConsiderationsDebug Unit (DBGU) Chip Identifier: updated reset value informationLCD Controller (LCDC) Updated Embedded Characteristics, Vertical Scaler, Active Mode Output Pin AssignmentLow Voltage Differential Signaling Controller (LVDSC) LVDSC_WPSR: corrected WPVSRC field sizeCSI-2 Demultiplexer Controller (CSI2DC): YUV 420 8-bit Legacy Mode: updated Figure 49.6; added Note, YUV 420 8-bit Mode: updated Table 49.12 and Table 49.13Image Sensor Controller (ISC): Updated Defective Pixel Correction (DPC), Green Disparity Correction (GDC), White Balance (WB) Module Black Level Correction (BLC) Rounding, Limiting and Packing (RLP) Module: updated DATY10 table row ISC_INTEN, ISC_INTDIS, ISC_INTMASK, ISC_INTSR: removed WPEInter-IC Sound Multi-Channel Controller (I2SMCC) Updated Figure 53.7Flexible Serial Communication Controller (FLEXCOM) Updated Baud Rate Generator, Baud Rate in Synchronous Mode, FIFO Overflow/Underflow Error, FIFO Overflow/Underflow Error, FIFO Overflow/Underflow Error Updated TXFPTEF and RXFPTEF definitions in FLEX_US_FESR, FLEX_SPI_SR, FLEX_TWI_FSR FLEX_TWI_SMBTR: added detail on WPEN FLEX_SPI_MR: added LSBHALFQuad Serial Peripheral Interface (QSPI) Embedded Characteristics: added supported standards Memory Registers/Commands Access: added note about the RBSYERR flag Added Peripheral Bus Access Errors Updated HyperFlash Mode, Twin-Quad Mode Instruction Frame Transmission Examples: corrected address range used in examples QSPI_IFR: updated PROTTYP description Updated Initialization Procedure, Figure 64.23. Added Figure 64.14, Figure 64.16, Figure 64.18, Figure 64.20, Figure 64.22Analog-to-Digital Controller (ADC): Updated Table 72.4Electrical Characteristics: Updated Table 73.3 Added Power Consumption in Active Mode Table 73.8, Table 73.9: updated NoteImpacts to Data Sheet: See above details.Reason for Change: To improve productivity.Change Implementation Status: CompleteDate Document Changes Effective: 19 Dec 2024
Description of Change:Microchip has released a new Document for the SAM9X7 Series Silicon Errata and Data Sheet Clarifications of devices. If you are using one of these devices please read the document located at SAM9X7 Series Silicon Errata and Data Sheet Clarifications.1)Added A1 device revision information throughout2)Added The device does not boot on some QSPI memories, Card Detect for SDMMC boot limited to PIOA pins, QSPI read with3)XDMA limited performance4)Updated Data Sheet ClarificationsReason for change: To Improve Productivity.
Microchip has released a new Document for the SAM9X7 Series Silicon Errata and Data Sheet Clarifications of devices. Notification Status: FinalDescription of Change: Added references to SAM9X75 System-in-Package (SiP) devices.Updated Table 1.Added: 6.1. SPLIP mode does not work with some header sizes 7. Controller Area Network (MCAN)Rephrased 3.4. Processor (CPU_CLK) and main system bus clock (MCK) source selectionImpacts to Data Sheet: NoneReason for Change: To improve productivity.
Microchip has released a new Errata for the SAM9X7 Series Silicon Errata and Data Sheet Clarifications of devices.Description of Change:Added 6.2.1. Incorrect DDR3L calibration value in section “DDR3-SDRAM/DDR3L-SDRAM Initialization” Updated 3.4. Incorrect MCK intermediate state when switching clocks
Microchip has released a new Errata for the SAM9X7 Series Silicon Errata and Data Sheet Clarifications of devices. Notification Status: FinalDescription of Change: First issue.Impacts to Data Sheet: NoneReason for Change: To Improve ProductivityChange Implementation Status: CompleteDate Document Changes Effective: 07 April 2023
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Available Packaging
Package Qty:
176 per Std. Mfr. Pkg