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Manufacturer Part #
DSPIC30F2010-30I/SP
dsPIC30F Series 512 B RAM 12 kB Flash 16-Bit Digital Signal Controller - SDIP-28
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| Mfr. Name: | Microchip | ||||||||||
| Standard Pkg: | Product Variant Information section Available PackagingPackage Qty:15 per Tube Package Style:SDIP-28 Mounting Method:Through Hole | ||||||||||
| Date Code: | |||||||||||
Product Specification Section
Microchip DSPIC30F2010-30I/SP - Product Specification
Shipping Information:
Item cannot ship to certain countries. See List
Item cannot ship to following countries:
ECCN:
3A991.a.2
This item may be subject to export licensing controls.
PCN Information:
N/A
File
Date
Part Status:
Active
Active
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Microchip DSPIC30F2010-30I/SP - Technical Attributes
Attributes Table
| Family Name: | dsPIC30F |
| Core Processor: | dsPIC |
| Program Memory Type: | Flash |
| Flash Size (Bytes): | 12kB |
| RAM Size: | 512B |
| Speed: | 40MHz |
| No of I/O Lines: | 21 |
| InterfaceType / Connectivity: | I2C/SPI/UART |
| Peripherals: | I2C/On-Chip-ADC/PWM/SPI/UART/Watchdog |
| Number Of Timers: | 3 |
| Supply Voltage: | 2.5V to 5.5V |
| Operating Temperature: | -40°C to +85°C |
| On-Chip ADC: | 6-chx10-bit |
| Watchdog Timers: | 1 |
| Package Style: | SDIP-28 |
| Mounting Method: | Through Hole |
Features & Applications
The DSPIC30F2010-30I/SP is a high-performance motor control 16-bit digital signal controller with an operating voltage range of 2.5 to 5.5 V and having program memory of 12 kB, available in SDIP-28 package.
Features:
- High-Performance Modified RISC CPU:
- Modified Harvard architecture.
- C compiler optimized instruction set architecture.
- 84 base instructions with flexible addressing modes.
- 24-bit wide instructions, 16-bit wide data path.
- 16 x 16-bit working register array.
- Up to 30 MIPs operation:
- DC to 40 MHz external clock input.
- 4 MHz-10 MHz oscillator input with PLL active (4x, 8x, 16x).
- Peripheral and External interrupt sources.
- 8 user selectable priority levels for each interrupt.
- 4 processor exceptions and software traps.
- Primary and Alternate interrupt Vector Tables.
- DSP Engine Features:
- Modulo and Bit-Reversed Addressing modes.
- Two, 40-bit wide accumulators with optional saturation logic.
- 17-bit x 17-bit single cycle hardware fractional/ integer multiplier.
- Single cycle Multiply-Accumulate (MAC) operation.
- 40-stage Barrel Shifter.
- Dual data fetch.
Pricing Section
Global Stock:
0
USA:
0
On Order:
0
Factory Lead Time:
4 Weeks
Quantity
Unit Price
15
$4.91
30
$4.85
45
$4.82
75
$4.78
150+
$4.68
Product Variant Information section
Available Packaging
Package Qty:
15 per Tube
Package Style:
SDIP-28
Mounting Method:
Through Hole
