Manufacturer Part #
SY100ELT23ZG
SY100ELT23 Series 5.5 V Dual Differential PECL-to-TTL Translator - SOIC-8
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| Mfr. Name: | Microchip | ||||||||||
| Standard Pkg: | Product Variant Information section Available PackagingPackage Qty:95 per Tube Package Style:SOIC-8 Mounting Method:Surface Mount | ||||||||||
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Microchip SY100ELT23ZG - Product Specification
Shipping Information:
ECCN:
PCN Information:
PCN Status:Final NotificationDescription of Change:Qualification of MMT as new final test site for selected SY100ELT22, SY100ELT23L and SY100ELT23 device families available in 8L SOIC (3.90mm) package.Reason for Change:To improve manufacturability by qualifying MMT as a new final test site.Change Implementation Status:In progressEstimated First Ship Date:November 29, 2024 (date code: 2448)
**Update to previous FPCN 98050******Revise affected parts list to remove SY89829UHY, SY89829UHY-TR and SY55856UHG catalog part number since these parts were EOL?ed****Description of Change:Qualification of UNIG as a new final test site for various products available in Tube and Tape & Reel packing media.Reason for Change:To improve manufacturability and on-time delivery performance by qualifying UNIG as a new final test site.
Description of Change:Qualification of MMT as an additional assembly site for selected SY100EPTxxxxx, SY100ELTxxxxx, SY100EL3xxxx and SY100EL1xxxx device families available in 8L SOIC (3.90mm) package.Reason for Change:To improve productivity by qualifying MMT as an additional assembly site.Change Implementation Status:In ProgressEstimated First Ship Date:March 15, 2023 (date code: 2311)
Part Status:
Microchip SY100ELT23ZG - Technical Attributes
| No of Channels: | 2 |
| Input Type: | PECL |
| Output Type: | TTL |
| Supply Voltage: | 4.5V to 5.5V |
| Package Style: | SOIC-8 |
| Mounting Method: | Surface Mount |
Features & Applications
The SY100ELT23ZG is a dual differential PECL-to-TTL translator with 24 mA TTL output. Available in SOIC-8 package.
The the low skew dual gate design of the ELT23 makes it ideal for applications which require the translation of a clock and a data signal. It is available in both ECL standards: the 10ELT is compatible with positive ECL 10H logic levels, while the 100ELT is compatible with positive ECL 100K logic levels.
Features:
- 3.0ns typical propagation delay
- <500ps typical output-to-output skew
- Differential PECL inputs
- 24mA TTL outputs
- Flow-through pinouts
- Internal input 50kO pulldown resistors
- Available in 8-pin SOIC packag
Available Packaging
Package Qty:
95 per Tube
Package Style:
SOIC-8
Mounting Method:
Surface Mount