Manufacturer Part #
SY100ELT23 Series 5.5 V Dual Differential PECL-to-TTL Translator - SOIC-8
|Standard Pkg:|| |
Product Variant Information section
95 per Tube
Microchip has released a new DeviceDoc for the SY100ELT23 - Dual Differential PECL-to-TTL Translator of devices.Description of Change: 1) Converted Micrel document SY100ELT23 to Microchip data sheet DS20006235A.2) Minor text changes throughout. 3) Removal of all reference to the discontinued SY10ELT23.Reason for Change: Conversion of Micrel datasheet to Microchip datasheet conventions.Date Document Changes Effective: 05 Aug 2019NOTE: Please be advised that this is a change to the document only the product has not been changed.
Description of Change:Release to production of listed Micrel Clock and Timing product type manufactured with the S1 process technology to Fabrication site (FAB 5).Pre Change:Fabricated at Micrel fabrication site (San Jose, CA, USA) (SJ) using 6 inch wafers.Post Change:Fabricated at Atmel Fabrication site FAB 5 (Colorado Springs, CO, USA) (COS) using 6 inch wafers. Reason for Change:To improve productivity with the closure of the Micrel fab (SJ) as part of the integration of Micrel and Microchip.
|No of Channels:||2|
|Supply Voltage:||4.5V to 5.5V|
|Mounting Method:||Surface Mount|
Features & Applications
The SY100ELT23ZG is a dual differential PECL-to-TTL translator with 24 mA TTL output. Available in SOIC-8 package.
The the low skew dual gate design of the ELT23 makes it ideal for applications which require the translation of a clock and a data signal. It is available in both ECL standards: the 10ELT is compatible with positive ECL 10H logic levels, while the 100ELT is compatible with positive ECL 100K logic levels.
- 3.0ns typical propagation delay
- <500ps typical output-to-output skew
- Differential PECL inputs
- 24mA TTL outputs
- Flow-through pinouts
- Internal input 50kΩ pulldown resistors
- Available in 8-pin SOIC packag
95 per Tube