Microchip | SY58605UMG-TR

This device includes Micrel's unique, 3-pin input termination architecture that interfaces to LVPECL, LVDS or CML differential signals, (AC- or DC-coupled) as small as 100 mV (200 mVpp) without any level-shifting or termination resistor networks in the signal path.

Features:

• Precision 325 mV LVDS buffer
• Guaranteed AC performance over temperature and voltage:
  • DC-to >3.2 Gbps throughput
  • <300ps typical propagation delay (IN-to-Q)
  • <100ps rise/fall times
• Fail Safe Input
  • Prevents output from oscillating when input is invalid
• Ultra-low jitter design
  • <1psRMS cycle-to-cycle jitter
  • <10psPP total jitter
  • <1psRMS random jitter
  • <10psPP deterministic jitter
• High-speed LVDS output
• 2.5 V ±5% power supply operation
• Industrial temperature range: -40 °C to +85 °C
• Available in 8-pin (2 mm x 2 mm) DFN package

Applications:

• All SONET clock and data distribution
• Fibre Channel clock and data distribution
• Gigabit Ethernet clock and data distribution
• Backplane distribution