AS7C3256A-12TINTR in Reel by Alliance Memory | Asynchronous SRAM | Future Electronics
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Alliance Memory | AS7C3256A-12TINTR

Manufacturer Part #

AS7C3256A-12TINTR

AS7C3256A Series 256-kbit (32 K x 8) 3.3 V 12 ns CMOS Static RAM - TSOP I-28

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Mfr. Name: Alliance Memory
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Product Specification Section
Alliance Memory AS7C3256A-12TINTR - Technical Attributes
Attributes Table
Memory Density: 256kb
Memory Organization: 32 K x 8
Supply Voltage-Nom: 3.3V
Access Time-Max: 12ns
Temperature Grade: Industrial
Package Style:  TSOP I-28
Mounting Method: Surface Mount
Features & Applications
The AS7C3256A is a 3.3V high-performance CMOS 262,144-bit Static Random-Access Memory (SRAM) device organized as 32,768 words × 8 bits. It is designed for memory applications requiring fast data access at low voltage, including PentiumTM, PowerPCTM, and portable computing. Alliance’s advanced circuit design and process techniques permit 3.3V operation without sacrificing performance or operating margins.

The device enters standby mode when CE is high. CMOS standby mode consumes 7.2 mW. Normal operation offers 75% power reduction after initial access, resulting in significant power savings during CPU idle, suspend, and stretch mode. Equal address access and cycle times (tAA, tRC, tWC) of 10/12/15/20 ns with output enable access times (tOE) of 5, 6, 7, 8 ns are ideal for high-performance applications. The chip enable (CE) input permits easy memory expansion with multiple-bank memory organizations.

A write cycle is accomplished by asserting chip enable (CE) and write enable (WE) LOW. Data on the input pins I/O0-I/O7 is written on the rising edge of WE (write cycle 1) or CE (write cycle 2). To avoid bus contention, external devices should drive I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE).

A read cycle is accomplished by asserting chip enable (CE) and output enable (OE) LOW, with write enable (WE) high. The chip drives I/O pins with the data word referenced by the input address. When chip enable or output enable is high, or write enable is low, output drivers stay in high-impedance mode. All chip inputs and outputs are TTL-compatible. Operation is from a single 3.3 ±0.3V supply. The AS7C3256A is packaged in high volume industry standard packages.

A 256kb 3.3V Fast Asynchronous Alliance product that has a 32K x8 configuration, with industrial temperature range (-40°C to 85°C), and a 28-pin TSOP I package. The part supports 12 nanoseconds speeds and is RoHS compliant. This part comes in tape and reel packaging.
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Pricing Section
Global Stock:
0
USA:
0
On Order:
0
Factory Stock:Factory Stock:
0
Factory Lead Time:
8 Weeks
Minimum Order:
1000
Multiple Of:
1000
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Tariff charges may apply if shipping to the United States. An estimate of tariff charges will be calculated at checkout.
Total
$2,720.00
USD
Quantity
Unit Price
1,000+
$2.72
Product Variant Information section