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Manufacturer Part #
ATTINY414-SSNR
ATtiny Series 4 KB Flash 256 B SRAM 20 MHz 8-Bit Microcontroller - SOIC-14
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| Mfr. Name: | Microchip | ||||||||||
| Standard Pkg: | Product Variant Information section Available PackagingPackage Qty:3000 per Reel Package Style:SOIC-14 Mounting Method:Surface Mount | ||||||||||
| Date Code: | 2232 | ||||||||||
Microchip ATTINY414-SSNR - Product Specification
Shipping Information:
ECCN:
PCN Information:
PCN Status:Final NotificationDescription of Change:Qualification of palladium coated copper with gold flash (CuPdAu) as an additional bond wire material for selected ATTINY16x, ATTINY204, ATTINY214, ATTINY322, ATTINY4x, ATTINY8x, ABR16EB14, PIC16F131, PIC16F152, PIC16F171, PIC16F180 and PIC16F181 device families available in 14L SOIC (.150in) package at MTAI assembly site.Reason for Change:To improve productivity and on-time delivery performance by qualifying palladium coated copper with gold flash (CuPdAu) as an additional bond wire material at MTAI assembly site.Change Implementation Status:In ProgressEstimated First Ship Date:14 November 2024 (date code: 2446)
***June 19, 2024: Reissued the initial notification to correct the typographical error in the Notification Subject***Description of Change:Qualification of palladium coated copper with gold flash (CuPdAu) as an additional bond wire material for selected ATTINY16x, ATTINY204, ATTINY214, ATTINY322, ATTINY4x, ATTINY8x, ABR16EB14, PIC16F131, PIC16F152, PIC16F171, PIC16F180 and PIC16F181 device families available in 14L SOIC (.150in) package at MTAI assembly site.Reason for Change:To improve productivity and on-time delivery performance by qualifying palladiumcoated copper with gold flash (CuPdAu) as an additional bond wire material at MTAI assembly site.
Description of Change:Qualification of palladium coated copper with gold flash (CuPdAu) as an additional bond wire material for selected ATTINY16x, ATTINY204, ATTINY214, ATTINY322, ATTINY4x, ATTINY8x, ABR16EB14, PIC16F131, PIC16F152, PIC16F171, PIC16F180 and PIC16F181 device families available in 14L SOIC (.150in) package at MTAI assembly site.Reason for Change:To improve productivity and on-time delivery performance by qualifying palladium coated copper with gold flash (CuPdAu) as an additional bond wire material at MTAI assembly site.
Microchip has released a new Document for the ATtiny212/214/412/414/416 Silicon Errata and Data Sheet Clarifications of devices.Description of Change:• Document:– Editorial updates• Silicon Errata Issues updated:– TWI: 2.12.1. TIMEOUT Bit Field in the TWIn.MCTRLA Register is Corrupted• Added new data sheet clarifications:– SPI:• 3.2.1. SPI Clock– Electrical Characteristics:• 3.4.1. Power Consumption. The Power Consumption in Power-Down (Max 25°C) reduced from 2 µA to 0.6 µA.• 3.4.3. SPI - Timing Characteristics• 3.4.4. Programming TimeReason for Change: To Improve Productivity
Microchip has released a new Errata for the ATtiny212/214/412/414/416 Silicon Errata and Data Sheet Clarification of devices. Notification Status: FinalDescription of Change:• Silicon Errata Issues added:– Device: 2.2.3. Write Operation Lost if Consecutive Writes to Specific Address Space– TCD: 2.11.2. Halting TCD and Waiting for SW Restart Does Not Work if Compare Value A is ‘0’ or Dual Slope Mode is Used• Added new data sheet clarification:– Electrical Characteristics: 3.3.1. I/O Pin CharacteristicsImpacts to Data Sheet: NoneReason for Change: To Improve ProductivityChange Implementation Status: CompleteDate Document Changes Effective: 22 Jun 2023
Microchip has released a new Errata for the ATtiny212/214/412/414/416 Silicon Errata and Data Sheet Clarification of devices. otification Status: FinalDescription of Change:? Document:? Editorial updates? Silicon Errata Issue added:? NVMCTRL: 2.6.1. Wrong Reset Value of NVMCTRL.CTRLA Register? Silicon Errata Issues updated:? Device: 2.2.2. Writing the OSCLOCK Fuse in FUSE.OSCCFG to ?1? Prevents Automatic Loading of Calibration Values? RTC: 2.8.1. Any Write to the RTC.CTRLA Register Resets the RTC and PIT Prescaler? TWI: 2.12.1. TIMEOUT Bits in the TWI.MCTRLA Register are Not Accessible? Silicon Errata Issue removed:? USART: Start-of-Frame Detection Can Unintentionally Be Triggered in Active Mode? Added new data sheet clarification:? SLPCTRL: 3.1.1. Sleep Mode Activity Overview? ADC: 3.2.1. VREFAImpacts to Data Sheet: NoneReason for Change: To Improve ProductivityChange Implementation Status: CompleteDate Document Changes Effective: 10 Mar 2023
Description of Change:Qualification of CuPdAu as an additional bond wire material for selected ATTINY16xx, ATTINY4xx, ATTINY2xx, ATTINY8xx, ATTINY3224 and PIC16F1xxxx device families available in 14L SOIC (.150in) package assembled at MTAI assembly site.Reason for Change:To improve manufacturability by qualifying CuPdAu as an additional bond wire material.
Part Status:
Microchip ATTINY414-SSNR - Technical Attributes
| Family Name: | ATtiny |
| Core Processor: | AVR |
| Program Memory Type: | Flash |
| Flash Size (Bytes): | 4kB |
| RAM Size: | 256B |
| Speed: | 20MHz |
| No of I/O Lines: | 12 |
| InterfaceType / Connectivity: | IrDA/I2C/LINbus/SPI/UART/USART |
| Peripherals: | Brown-out Detect/POR/Reset/Watchdog |
| Number Of Timers: | 3 |
| Supply Voltage: | 1.8V to 5.5V |
| Operating Temperature: | -40°C to +105°C |
| On-Chip ADC: | 10-chx10-bit |
| On-Chip DAC: | 1-chx8-bit |
| Watchdog Timers: | 1 |
| Package Style: | SOIC-14 |
| Mounting Method: | Surface Mount |
Available Packaging
Package Qty:
3000 per Reel
Package Style:
SOIC-14
Mounting Method:
Surface Mount