Manufacturer Part #
74LVC273D,118
74LVC Series 3.6 V Reset Positive-Edge Trigger Octal D-Type Flip-Flop - SOIC-20
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| Mfr. Name: | Nexperia | ||||||||||
| Standard Pkg: | Product Variant Information section Available PackagingPackage Qty:2000 per Reel Package Style:SOIC-20 Mounting Method:Surface Mount | ||||||||||
| Date Code: | 2343 | ||||||||||
Product Specification Section
Nexperia 74LVC273D,118 - Product Specification
Shipping Information:
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ECCN:
EAR99
PCN Information:
N/A
File
Date
Part Status:
Active
Active
Nexperia 74LVC273D,118 - Technical Attributes
Attributes Table
| Logic Circuit: | D-Type, Flip Flop IC |
| Family: | A/LVC/E/H/U |
| No of Functions / Channels: | 8 |
| Supply Voltage-Nom: | 1.65|3.6V |
| Package Style: | SOIC-20 |
| Mounting Method: | Surface Mount |
Features & Applications
The 74LVC273D is a low-voltage Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.
The 74LVC273 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common clock (CP) and master reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop.
Features:
- Wide supply voltage range from 1.2 to 3.6 V
- Inputs accept voltages up to 5.5 V
- CMOS low power consumption
- Direct interface with TTL levels
- Output drive capability 50 Ohm transmission lines at 85 Cel
- Complies with JEDEC standard no. 8-1A
- ESD protection:
- HBM EIA/JESD22-A114-A exceeds 2000 V
- MM EIA/JESD22-A115-A exceeds 200 V
- Specified from -40 to +85 Cel. and -40 to +125 Cel
Pricing Section
Global Stock:
2,000
USA:
2,000
On Order:
0
Factory Lead Time:
N/A
Quantity
Unit Price
2,000+
$0.43
Product Variant Information section
Available Packaging
Package Qty:
2000 per Reel
Package Style:
SOIC-20
Mounting Method:
Surface Mount