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Manufacturer Part #
A54SX32-PQG208I
SX
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| Mfr. Name: | Microchip | ||||||||||
| Standard Pkg: | Product Variant Information section Available PackagingPackage Qty:24 per Tray | ||||||||||
| Date Code: | |||||||||||
Microchip A54SX32-PQG208I - Product Specification
Shipping Information:
ECCN:
PCN Information:
Description:eSign # EOL0000505: End of Life (EOL) of A54SX16P-1PQG208, A54SX16P-1PQG208I, A54SX16P-1PQG208M, A54SX16P-2PQG208, A54SX16P-2PQG208I, A54SX16P-PQG208, A54SX16P-PQG208I, A54SX16P-PQG208M, A54SX32-1PQG208, A54SX32-1PQG208I, A54SX32-1PQG208M, A54SX32-2PQG208, A54SX32-2PQG208I, A54SX32-PQG208, A54SX32-PQG208I, A54SX32-PQG208IX218 and A54SX32-PQG208M catalog part numbers (CPN).Reason for EOL:No longer have manufacturing support for the CPN listed in the attachment.Last Date for Bookings (LTB): 01 December 2025Last Date for Shipments (LTS): 01 December 2026
PCN Status:Final NotificationDescription of Change:Release of updated software version of Synplify Pro Microchip Edition v2023.09M-1 & Synplify Pro Standalone v2023.09-1 for various FPGA devices.Reason for Change:Synplify Pro standalone all-vendor versions 2023.03 and 2023.09, as well as Microchip Edition version 2023.09M could incorrectly extract the enable signal logic during RTL synthesis when the signal path contains a set of multiplexors connected in series around a register, and the MUXs are driven by bus ports. This is described in the attached Customer Notice.
Description of Change:Release of updated Synplify Pro ME version S-2021.09M-SP2 FPGA synthesis software bundled with Libero SoC v2022.3Reason for Change:Release updated Synplify Pro ME version S-2021.09M-SP2 FPGA synthesis software bundled with Libero SoC v2022.3 to prevent incorrect Verilog mapping of RTL using increment/decrement operations (++ / --) while indexing into an array on the right-hand side (RHS) of an assignment statement, as described in the attached Customer Notice.
Description of Change:Release of updated Synplify Pro ME version S-2021.09M-SP2 synthesis software bundled with Libero SoC v2022.3 as described in the attached customer notification details.Reason for Change:Release updated Synplify Pro ME version S-2021.09M-SP2 synthesis software bundled with Libero SoC v2022.3 to prevent incorrect VHDL expression evaluation during compilation, when performing subtraction with a real constant number operand, and an additional division/multiplication operation that uses a variable. This is to fix a VHDL compiler issue that occurs in specific VHDL expressions.
Part Status:
Available Packaging
Package Qty:
24 per Tray