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Manufacturer Part #
APA075-TQG100I
APA Series 75000 System Gates 66I/O 27kb ProASICPLUS® FPGA - TQFP-100
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| Mfr. Name: | Microchip | ||||||||||
| Standard Pkg: | Product Variant Information section Available PackagingPackage Qty:90 per Tray Package Style:TQFP-100 Mounting Method:Surface Mount | ||||||||||
| Date Code: | 2510 | ||||||||||
Microchip APA075-TQG100I - Product Specification
Shipping Information:
ECCN:
PCN Information:
PCN Status:Final NotificationDescription of Change:Release of updated software version of Synplify Pro Microchip Edition v2023.09M-1 & Synplify Pro Standalone v2023.09-1 for various FPGA devices.Reason for Change:Synplify Pro standalone all-vendor versions 2023.03 and 2023.09, as well as Microchip Edition version 2023.09M could incorrectly extract the enable signal logic during RTL synthesis when the signal path contains a set of multiplexors connected in series around a register, and the MUXs are driven by bus ports. This is described in the attached Customer Notice.
Description of Change:Release of updated Synplify Pro ME version S-2021.09M-SP2 FPGA synthesis software bundled with Libero SoC v2022.3Reason for Change:Release updated Synplify Pro ME version S-2021.09M-SP2 FPGA synthesis software bundled with Libero SoC v2022.3 to prevent incorrect Verilog mapping of RTL using increment/decrement operations (++ / --) while indexing into an array on the right-hand side (RHS) of an assignment statement, as described in the attached Customer Notice.
Description of Change:Release of updated Synplify Pro ME version S-2021.09M-SP2 synthesis software bundled with Libero SoC v2022.3 as described in the attached customer notification details.Reason for Change:Release updated Synplify Pro ME version S-2021.09M-SP2 synthesis software bundled with Libero SoC v2022.3 to prevent incorrect VHDL expression evaluation during compilation, when performing subtraction with a real constant number operand, and an additional division/multiplication operation that uses a variable. This is to fix a VHDL compiler issue that occurs in specific VHDL expressions.
Part Status:
- https://futureelec.wufoo.com/forms/?formname=r8bzou01ws8brs&field12=NA&field16=en&field2=APA075-TQG100I&field4=Microchip&field18=https://p1na.futureelectronics.com/p/semiconductors--programmable-logic--fpga-flash/apa075-tqg100i-microchip-7074038
- https://futureelec.wufoo.com/forms/?formname=r8bzou01ws8brs&field12=NA&field16=en&field2=APA075-TQG100I&field4=Microchip&field18=https://p1na.futureelectronics.com/p/semiconductors--programmable-logic--fpga-flash/apa075-tqg100i-microchip-7074038
Microchip APA075-TQG100I - Technical Attributes
| System Gates: | 75000 |
| No of I/O Lines: | 66 |
| Operating Frequency-Max: | 180MHz |
| RAM Size (Bits): | 27kb |
| Supply Voltage: | 2.3V to 2.7V |
| Operating Temp Range: | -40°C to +85°C |
| Storage Temperature Range: | -55°C to +110°C |
| Interface Type: | Jtag |
| Temperature Grade: | Industrial |
| Moisture Sensitivity Level: | 3 |
| Package Style: | TQFP-100 |
| Mounting Method: | Surface Mount |
Available Packaging
Package Qty:
90 per Tray
Package Style:
TQFP-100
Mounting Method:
Surface Mount