onsemi | MC74HC165ADR2G

The first CMOS (Complementary Metal–Oxide–Semiconductor)  logic family of integrated circuits was introduced 1968. Initially CMOS logic was slower than LS-TTL; however, because the logic thresholds of CMOS were proportional to the power supply voltage, CMOS devices were well-adapted to battery-operated systems with simple power supplies.

Because of the incompatibility of the CD4000 series of chips with the previous TTL family, a new standard emerged which combined the best of the TTL family with the advantages of the CD4000 family. It was known as the 74HC (High performance silicon gate) family of devices.

With HC/HCT logic and LS-TTL logic competing in the market it became clear that a logic device that combined high speed, with low power dissipation and compatibility with older logic families was needed. A whole range of newer families has emerged that use CMOS technology. Some of the more important family designators of these newer devices includes LV/LVT/ALVT.

The MC74HC165A is identical in pinout to the LS165. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.

This device is an 8-bit shift register with complementary outputs from the last stage. Data may be loaded into the register either in parallel or in serial form. When the Serial Shift/Parallel Load(bar) input is low, the data is loaded asynchronously in parallel. When the Serial Shift/Parallel Load(bar) input is high, the data is loaded serially on the rising edge of either Clock or Clock Inhibit (see the Function Table).

The 2-input NOR clock may be used either by combining two independent clock sources or by designating one of the clock inputs to act as a clock inhibit.

MC74HC165ADR2G is an 8Bit Serial/Par-In/Serial Out Shift Register in SOIC16 Pkg.