
Référence fabricant
25LC640A-I/SN
25LC640A Series 64 Kbit (8K x 8) 5.5 V SMT SPI Bus Serial EEPROM - SOIC-8
Microchip 25LC640A-I/SN - Spécifications du produit
Informations de livraison:
ECCN:
Informations PCN:
Revision History:February 7, 2022: Issued final notification.April 6, 2022: Re-issuance of PCN to update the affected CPN list. Update the estimated first shipment date on March 30, 2022.Description of Change:Qualification of 3280 die attach material and new lead frame design for selected products available in 8L SOIC package assembled at MMT assembly site.Pre and Post Change Summary: See attachedImpacts to Data Sheet:NoneChange ImpactNoneReason for Change:To improve productivity by qualifying new lead frame design and die attach material.Change Implementation Status:In ProgressEstimated First Ship Date:March 30, 2022 (date code: 2214)Note: Please be advised that after the estimated first ship date customers may receive pre and post change parts.Time Table Summary: See attached
CCB 4993 Final Notice: Qualification of 3280 die attach material and new lead frame design for selected products available in 8L SOIC package assembled at MMT assembly site.PCN Type: Manufacturing ChangeDescription of Change:Qualification of 3280 die attach material and new lead frame design for selected products available in 8L SOIC package assembled at MMT assembly site.Impacts to Data Sheet: NoneChange Impact: NoneReason for Change:To improve productivity by qualifying new lead frame design and die attach material.Change Implementation Status: In ProgressEstimated First Ship Date: February 28, 2022 (date code: 2210)
NOTICE WITHDRAWALPCN Status: Cancellation of Notification.Reason for Change:Microchip has decided to not qualify a new lead frame design for selected products available in 8L SOIC package using 8390A die attach and palladium coated copper with gold flash (CuPdAu) bond wire material assembled at MMT assembly site.Revision History:February 09, 2021: Issued initial notification.February 01, 2022: Issued cancellation notification.
PCN Status: Final notificationPCN Type: Manufacturing ChangeDescription of Change: Qualification of 36.5K process technology for selected products of the 25AA640A and 25LC640A device families. Impacts to Data Sheet: NoneChange Impact: None Reason for Change: To improve manufacturability by qualifying an additional fabrication site.Change Implementation Status: In ProgressEstimated First Ship Date:December 01, 2021 (date code: 2149)NOTE: Please be advised that after the estimated first ship date customers may receive pre and post change parts.
Microchip has released a new Product Documents for the 25AA640A/25LC640A 64K SPI Serial EEPROM Data Sheet of devices. Notification Status: FinalDescription of Change: 1) Added a note to Table 1-2 that explains the array architecture and how endurance is specified. 2) Switched Sections 2.0 and 3.0 and updated Table 2-1. 3) Updated packaging outline drawings4) Corrected Extended (E) temperature label5) Added Automotive product identification table6) Made minor formatting and grammar edits.Impacts to Data Sheet: NoneReason for Change: To Improve ProductivityChange Implementation Status: CompleteDate Document Changes Effective: 30 Jun 2021
Revision History:February 9, 2021: Issued final notification. Provided estimated first ship date to be February 19, 2021.March 22, 2021: Re-issued final notification. Attached the qualification report.Description of Change:Qualification of a new lead frame design for selected products available in 8L SOIC package using8390A die attach and gold (Au) bond wire material assembled at MMT assembly site.Pre Change:Using lead frame without lead lockPost Change:Using lead frame with lead lockReason for Change:To improve productivity by qualifying new lead frame designChange Implementation Status:In ProgressEstimated First Ship Date:February 19, 2021 (date code: 2108)
Description of Change:Qualification of a new lead frame design for selected products available in 8L SOIC package using 8390A die attach and palladium coated copper wire with gold flash (CuPdAu) bond wire material assembled at MMT assembly site.Pre Change:Using lead frame without lead lockPost Change:Using lead frame with lead lockReason for Change:To improve productivity by qualifying new lead frame design.Estimated Qualification Completion Date:March 2021
Description of Change:Qualification of a new lead frame design for selected products available in 8L SOIC package using 8390A die attach and gold (Au) bond wire material assembled at MMT assembly site.Pre Change:Using lead frame without lead lockPost Change:Using lead frame with lead lockReason for Change:To improve productivity by qualifying new lead frame designEstimated First Ship Date: February 19, 2021 (date code: 2108)
Statut du produit:
Microchip 25LC640A-I/SN - Caractéristiques techniques
Memory Density: | 64kb |
Memory Organization: | 8 K x 8 |
Supply Voltage-Nom: | 2.5V to 5.5V |
Clock Frequency-Max: | 10MHz |
Write Cycle Time-Max (tWC): | 5ms |
Style d'emballage : | SOIC-8 |
Méthode de montage : | Surface Mount |
Fonctionnalités et applications
The 25LC640A series of 64 kbit Serial Electrically Erasable PRO is accessed via a simple Serial Peripheral Interface (SPI) compatible serial bus. The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device is controlled through a Chip Select [CS(bar)] input.
Communication to the device can be paused via the hold pin [HOLD(bar)]. While the device is paused, transitions on its inputs will be ignored, with the exception of Chip Select, allowing the host to service higher priority interrupts. The 25XX640A is available in standard packages including 8-lead PDIP and SOIC, and advanced packaging including 8-lead MSOP, 8-lead TSSOP, DFN and TDFN.
Features:
- Max. Clock 10 MHz
- Low-Power CMOS Technology
- Max. Write Current: 5 mA at 5.5 V, 10 MHz
- Read Current: 5 mA at 5.5 V, 10 MHz
- Standby Current: 1 μA at 5.5 V
- 8192 x 8-bit Organization
- 32 Byte Page
- Self-Timed Erase and Write Cycles (5 ms max.)
- Block Write Protection
- Protect none, 1/4, 1/2 or all of array
- Built-In Write Protection
- Power-on/off data protection circuitry
- Write enable latch
- Write-protect pin
- Sequential Read
- High Reliability
- Endurance: 1,000,000 erase/write cycles
- Data retention: > 200 years
- ESD protection: > 4000 V
- Temperature Ranges Supported;
- Industrial (I): -40°C to +85°C
Learn more about the 25LC640 family of EEPROM
Emballages disponibles
Qté d'emballage(s) :
100 par Tube
Style d'emballage :
SOIC-8
Méthode de montage :
Surface Mount