Nexperia ESD protection
The role of ESD protection in the all-IP car.
How Ethernet and new architectures require new ESD protection concepts to provide the highest system reliability
It was Henry Ford who said, ‘You can have it in any color you want, as long as it is black.’ This statement might have been valid decades ago, but customer expectations have grown dramatically, and now the modern automotive world is currently dominated by three major trends: electrification, autonomous driving, and connectivity. While the first has a massive impact on the power train and the high-voltage part of the wiring harness, the last two are driving a paradigm change in the way Electronic Control Units (ECUs) communicate in the car.
Trends and concepts drawn from consumer electronics, communications infrastructure and the IoT are being adopted in the vehicle. Autonomous driving and in-vehicle connectivity in particular are creating demand for higher data-transfer rates and a zonal architecture.
The topology of today’s in-vehicle networks can only be understood by reference to signaling technologies used in the past. The first electrical control interfaces in vehicles connected the controller and actuator via a single wire. As demand for functionality increased, bus networks were introduced. The buses connected the control units which managed discrete functional blocks, such as the power train or body control.
This scheme can still be found in today’s cars, even though it has expanded due to the increased demand for bandwidth and interconnections. The implementation of physically separate buses to meet security requirements makes the topology even more complex.
If a designer were to devise an in-vehicle network from scratch today, the approach would be different. Modern techniques, such as the decoupling of physical and software addresses, plug-and-play configurability, and end-to-end encryption would be readily available. Today’s in-vehicle networks do not provide these features, however, and retrofitting is expensive and does not work properly in many cases.
In contrast to the old way of connecting ECUs which talk to each other directly, a zonal architecture aims to form a network by which, in principle, any ECU can talk to any other. To do so, every ECU is connected to a domain or zone controller directly via a short CAN, LIN or 10BASE-T1s interface. The domain or zone controllers are connected using a high speed backbone network technology such as 1000BASE-T1 (see Figure 1).
Fig. 1: Modern in-vehicle network with zonal architecture and Ethernet as the backbone
Software makes the system very versatile: virtual CAN/LIN networks can be implemented, so that legacy ECUs can operate as though via an old-fashioned CAN-/LIN-only topology. As every ECU has a dynamic Internet Protocol (IP) address, plug-and-play operation as well as reconfigurability, for instance supporting over-the-air updating, are possible. When based on software, secure sub-networks can be formed to ensure compliance with safety standards in safety-critical applications and to protect sensitive data.
Automotive Ethernet is the system of choice for such a topology, as it inherently provides the desired flexibility. Furthermore, it is easy for engineers to implement, as it is the standard technology in today’s communications infrastructure.
The different speed classes suit the three different stages of the zonal architecture: 1000BASE-T1 and multi-gigabit Ethernet for the connection of the zone controllers; 100BASE-T1 for the direct connection of ECUs to the zone controller; and 10BASE-T1s to connect ECUs with a limited demand for bandwidth to a zone controller.
This enables the concept ‘all-IP car’ connected solely via automotive Ethernet. The expert community is split on the question of whether this idea will be realized in future, or even whether it is desirable. The general consensus is that legacy protocols such as LIN, CAN and FlexRay will remain in zonal architectures for cost and legacy reasons. The exception to the zonal architecture, according to the experts, can be found in the high-speed connection of driver-assistance system sensors to their respective control units. Here, no flexibility is required, and a mostly unidirectional, high-bandwidth data stream needs to be transmitted. The technology of choice, SerDes interfaces, fulfils this need.
Faced with the mega-trends discussed above, hardware engineers must handle a specific problem in network communications design: ESD robustness. As the feature size of ICs shrinks, engineers can no longer sacrifice design space for internal ESD protection. This means that new concepts of external ESD protection come into play. This is necessary, since the robustness of device-level ESD protection might be sufficient, but at the system level the protection is inadequate. In the light of the security threats prevalent in highly connected architectures, and especially when implementing autonomous driving technologies, the danger posed by potential system failures caused by ESD events is severe and must be prevented.
In the system implementation specification for 100BASE-T1, the OPEN Alliance proposes two possible external ESD protection devices. As shown in Figure 2, one can be placed at the connector (ESD_1) and one at the PHY (ESD_2). The specification allows the use of none, one or both devices to achieve the desired ESD robustness.
Fig. 2: Interface topology for 100BASE-T1 according to the OPEN Alliance. ESD protection is located at the connector and as part of the transceiver block.
External ESD protection at the PHY is considered a part of the PHY from the point of view of the Ethernet specification. Hence the PHY in combination with external protection needs to pass all requirements that apply to the PHY alone. The protection at the connector must comply with the OPEN Alliance specification for external ESD protection devices. Besides having maximum capacitance of 3pF, the ESD protection device should feature a minimum trigger voltage of 100V, due to the placement at the connector.
From a system perspective, external ESD protection at the connector is superior, and offers the best way to design a robust interface. This can be observed when using an EMI scanner during an ESD event, as shown in Figure 3: here, the color scale reflects the current amplitude from blue (0A) to red (maximum current). Three cases of ESD protection placements are compared.
Scenario 1 shows current amplitude during an ESD event for the Medium-Dependent Interface (MDI) without external ESD protection: high current flows throughout the PCB from the connector to the PHY.
In scenario 2, an ESD protection device is positioned between the Common-Mode Choke (CMC) and the PHY. Though the current at the PHY is lower, high current still flows through the PCB, weakening the passive and active components.
In scenario 3, the ESD protection is placed at the connector before the CMC and PHY as recommended. Very little electrical stress can be observed in throughout the MDI, providing the best system-level robustness and reliability.
Figure 3: Current amplitude during an ESD event for the MDI without  and with external ESD protection at the PHY  and at the connector . The color scale reflects the current amplitude from blue (0A) to red (maximum current).
Technical differences between ESD protection devices can have a marked impact on the result of this measurement and thus on the ESD robustness of the interface. The interplay of the saturation characteristic of the CMC and the clamping behavior of the external ESD protection are the most important factors. Clamping needs to be as low as possible, to prevent the CMC from going into saturation. The requirements of a trigger voltage, however, and the ‘unwanted clamping’ test need to be met as well. There are currently three main technologies which might be applicable to ESD protection: Zener diodes, advanced silicon technologies (such as silicon-controlled rectifiers, open-base transistors and other snap-back technologies), and varistors.
Considering the RF requirements of the interface, it is clear that a Zener diode is not an option; only silicon-based or varistor technology can be used. Silicon technology can make use of the snap-back effect, resulting in very low clamping voltages while meeting the other requirements of the norm. Varistors may also offer suitable RF behavior and high trigger voltages. The clamping voltage however is substantially higher. This can be seen in the Transmission Line Pulse (TLP) graph in Figure 4, together with the resulting discharge currents at 6kV. The snap-back and resulting very low clamping of the Nexperia PESD2ETH1G-T provides better protection than the varistor based solution does.
Fig. 4: TLP graph (left) of a silicon based ESD protection device, Nexperia’s PESD2ETH1G-T (1) and of a varistor (2) and the corresponding ESD discharge current measurements (right)
The evolution of the wiring harness in vehicles offers great opportunities for new functionality, but also confronts design engineers with new design problems. New ESD protection concepts help to achieve high system-level robustness while offering more PCB design flexibility.