onsemi | MC74HC589ADR2G

The first CMOS (Complementary Metal–Oxide–Semiconductor)  logic family of integrated circuits was introduced 1968. Initially CMOS logic was slower than LS-TTL; however, because the logic thresholds of CMOS were proportional to the power supply voltage, CMOS devices were well-adapted to battery-operated systems with simple power supplies.

Because of the incompatibility of the CD4000 series of chips with the previous TTL family, a new standard emerged which combined the best of the TTL family with the advantages of the CD4000 family. It was known as the 74HC (High performance silicon gate) family of devices.

With HC/HCT logic and LS-TTL logic competing in the market it became clear that a logic device that combined high speed, with low power dissipation and compatibility with older logic families was needed. A whole range of newer families has emerged that use CMOS technology.  Some of the more important family designators of these newer devices includes LV/LVT/ALVT.

The MC74HC589A is similar in function to the HC597, which is not a 3-state device. The device inputs are compatible with standard CMOS outputs, with pull-up resistors, they are compatible with LSTTL outputs.

This device consists of an 8-bit storage latch which feeds parallel data to an 8-bit shift register. Data can also be loaded serially (see Function Table). The shift register output, QH, is a three-state output, allowing this device to be used in bus-oriented systems.

The MC74HC589ADR2G is a 8-Bit Shift Register that comes in a 16Pin SOIC Package.