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Manufacturer Part #

74HC138PW,118

74HC Series 6 V 3-to-8 Line Decoder/Demultiplexer Inverting - TSSOP-16

ECAD Model:
Mfr. Name: Nexperia
Standard Pkg:
Product Variant Information section
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Product Specification Section
Technical Attributes
Attributes Table
Logic Circuit: Decoder/Demux
Family: A/HC/T/U
No of Functions / Channels: 1
Supply Voltage-Nom: 5V
Supply Current: 8µA
Power Dissipation: 500mW
Propagation Delay: 150ns
Operating Temperature: -40°C to +125°C
Capacitance: 3.5pF
No of Inputs: 3
No of Outputs: Eight
High Level Output Current: -5.2mA
Low Level Output Current: 5.2mA
No of Pins: 16
Quiescent Current: 50mA
Moisture Sensitivity Level: 1
Package Style:  TSSOP-16
Mounting Method: Surface Mount
Features & Applications

The 74HC138PW is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The 74HC138 decoder accepts three binary weighted address inputs (A0, A1 and A3) and when enabled, provides 8 mutually exclusive active LOW outputs (Y0 to Y7).

The 74HC138 features three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the 74HC138 to a 1-of-32 (5 lines to 32 lines) decoder with just four 74HC138 ICs and one inverter.

Features:

  • Demultiplexing capability
  • Multiple input enable for easy expansion
  • Complies with JEDEC standard no. 7A
  • Ideal for memory chip select decoding
  • Active LOW mutually exclusive outputs
  • ESD protection:
    • HBM EIA/JESD22-A114-C exceeds 2000 V
    • MM EIA/JESD22-A115-A exceeds 200 V
  • Specified from -40 Cel to +85 Cel and from -40 Cel to +125 Cel

Pricing Section
Global Stock:
0
USA:
0
155,000
Factory Stock:Factory Stock:
0
Factory Lead Time:
52 Weeks
Minimum Order:
2500
Multiple Of:
2500
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Total
$575.00
USD
Quantity
Web Price
2,500
$0.23
5,000
$0.189
7,500
$0.187
10,000
$0.186
12,500+
$0.185
Product Variant Information section