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Référence fabricant
74HC138PW,118
74HC Series 6 V 3-to-8 Line Decoder/Demultiplexer Inverting - TSSOP-16
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| Nom du fabricant: | Nexperia | ||||||||||
| Emballage standard: | Product Variant Information section Emballages disponiblesQté d'emballage(s) :2500 par Reel Style d'emballage :TSSOP-16 Méthode de montage :Surface Mount | ||||||||||
| Code de date: | 2512 | ||||||||||
Nexperia 74HC138PW,118 - Spécifications du produit
Informations de livraison:
ECCN:
Informations PCN:
Statut du produit:
- https://futureelec.wufoo.com/forms/?formname=r8bzou01ws8brs&field12=NA&field16=fr&field2=74HC138PW,118&field4=Nexperia&field18=https://p1na.futureelectronics.com/fr/p/semiconductors--logic--74-series--a-hc-t/74hc138pw-118-nexperia-8066649
- https://futureelec.wufoo.com/forms/?formname=r8bzou01ws8brs&field12=NA&field16=fr&field2=74HC138PW,118&field4=Nexperia&field18=https://p1na.futureelectronics.com/fr/p/semiconductors--logic--74-series--a-hc-t/74hc138pw-118-nexperia-8066649
Nexperia 74HC138PW,118 - Caractéristiques techniques
| Logic Circuit: | Decoder/Demux |
| Family: | A/HC/T/U |
| No of Functions / Channels: | 1 |
| Supply Voltage-Nom: | 5V |
| Supply Current: | 8µA |
| Power Dissipation: | 500mW |
| Propagation Delay: | 150ns |
| Operating Temperature: | -40°C to +125°C |
| Capacitance: | 3.5pF |
| No of Inputs: | 3 |
| No of Outputs: | Eight |
| High Level Output Current: | -5.2mA |
| Low Level Output Current: | 5.2mA |
| No of Pins: | 16 |
| Quiescent Current: | 50mA |
| Moisture Sensitivity Level: | 1 |
| Style d'emballage : | TSSOP-16 |
| Méthode de montage : | Surface Mount |
Fonctionnalités et applications
The 74HC138PW is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The 74HC138 decoder accepts three binary weighted address inputs (A0, A1 and A3) and when enabled, provides 8 mutually exclusive active LOW outputs (Y0 to Y7).
The 74HC138 features three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the 74HC138 to a 1-of-32 (5 lines to 32 lines) decoder with just four 74HC138 ICs and one inverter.
Features:
- Demultiplexing capability
- Multiple input enable for easy expansion
- Complies with JEDEC standard no. 7A
- Ideal for memory chip select decoding
- Active LOW mutually exclusive outputs
- ESD protection:
- HBM EIA/JESD22-A114-C exceeds 2000 V
- MM EIA/JESD22-A115-A exceeds 200 V
- Specified from -40 Cel to +85 Cel and from -40 Cel to +125 Cel
Emballages disponibles
Qté d'emballage(s) :
2500 par Reel
Style d'emballage :
TSSOP-16
Méthode de montage :
Surface Mount
