SAML11: 16KB Flash 8KB SRAM 32MHz ARM Cortex-M23 32-Bit Microcontroller-VQFN-24
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Microchip has released a new DeviceDoc for the SAM L10/L11 Family Data Sheet of devicesDescription of Change: Updated the following sections:1. Features2. Ordering Information3. Memories4. Processor and Architecture5. Peripherals Configuration Summary6. SAM L11 Specific Security Features7. Peripheral Access Controller8. GCLK9. MCLK10. FREQM11. PM12. OSCCTRL13. OSC32KCTRL14. SUPC15. WDT16. RTC17. DMAC18. EIC19. NVMCTRL20. TRAM21. PORT - I/O Pin Controller22. EVSYS23. SERCOM24. SERCOM - USART25. SERCOM - SPI26. SERCOM I2C27. TC28. TRNG29. CCL30. ADC31. AC32. DACReason for Change: To Improve ManufacturabilityPlease be advised that this is a change to the document only the product has not been changed.
ERRATA - SAM L10/L11 Family Silicon Errata and Data Sheet ClarificationMicrochip has released a new DeviceDoc for the SAM L10/L11 Family Silicon Errata and Data Sheet Clarification of devices.Description of Change: The following new errata were added to: 1) RTC section: 2.9.5 Prescaler Reference: TMR102-52, 2.9.6 Active Layer Protection Reference: TMR102-66, 2.9.7. Tamper Detection Timestamp Reference: TMR102-67 and 2.9.8 Tamper Detection Timestamp Reference: TMR102-60. 2) SERCOM USART section: 2.12.5 Wakeup Reference: COM100-41Reason for Change: To Improve ProductivityPlease be advised that this is a change to the document only the product has not been changed
Microchip has released a new DeviceDoc for the SAM L10/L11 Family Silicon Errata and Data Sheet Clarification of devices.Description of Change:The following new errata were added:- RTC: 2.9.4 Tamper Detection Timestamp- SUPC: 2.15.1 Buck Converter Mode- OSC32KCTRL: 2.16.1 External 32.768KHz Crystal Oscillator- Boot ROM: 2.17.1 GCM APIThe following errata is updated:- ADC: 2.1.1 Reference Buffer Offset CompensationThe following Data Sheet clarifications were added:Updates to Electrical Specifications Tables: a) Table 46-8, b) Table 46-54, c) Table 47-2Reason for Change: To Improve ProductivityDate Document Changes Effective: 19 Feb 2019NOTE: Please be advised that this is a change to the document only the product has not been changed.
Microchip has released a new DeviceDoc for the SAM L10/L11 Family Data Sheet of devices.Description of Change:1) Configuration Summary - Updated SAML10/L11 Family Features2) Oscillators Pinout - Updated XOSC32 Jitter Minimization3) Memories- Updated NVM Software Calibration Bitfields Definition- Updated SAM L11 BOCOR Bitfields Definition- Updated SAM L11 BOCOR Mapping4) 13.1 Features- Updated Features- Updated CRYA APIs Addresses with a note5) Boot ROM- Updated Secure Boot Options- Updated Accessible Memory Range by Read Auxiliary Row Command, and added a note6) Device Service Unit (DSU) - Updated STATUSB Register7) Power Manager (PM) - Updated PLCFG Register8) Oscillators Controller (OSCCTRL)- Corrected missing Block Diagram- Updated the reset value for the STATUS Register9) 32KHz Oscillators Controller (OSC32KCTRL) - Updated the ULP32KSW bit in the OSCULP32K Register10) Supply Controller (SUPC) - Corrected erroneous text and added a note to Low Power VREF in Active Mode11) Real Time Counter (RTC)- Updated RTC Block Diagram (Tamper Detection Use Case)- Updated Active Layer Protection- Updated TAMPCTRL Register with new notes for the DEBNC and TAMLVL bits- Updated TAMPCTRLB Register with a note for the ALSI bits12) Direct Memory Access Controller (DMAC)- Updated the text for the DMAC Clocks section- Updated the LVLEN bits for the CRTL Register- Updated the LVLEX bits for the ACTIVE Register13) External Interrupt Controller (EIC)- Updated the NMIFLAG Register- Updated the CONFIG Register to reflect changes to the FILTEN and SENSE bits14) Nonvolatile Memory Controller (NVMCTRL)- Corrected erroneous text in Cache- Corrected table entries in Memory Regions AHB Access Limitations and an updated a note.- Updated Data Flash Scrambling15) TrustRAM (TRAM)- Corrected Erroneous text in Overview- Updated Features16) I/O Pin Controller (PORT) - Updated the PORTEI, EVACT, and PID bits in the EVCTRL Register17) Event System (EVSYS) - Corrected text in Initialization18) SERCOM USART- Updated the BAUD Register- Updated the equation in the RXPL Register19) SERCOM I2C- Updated Signal Description- Updated the property for the slave DATA Register- Updated the master DATA Register20) Timer/Counter (TC)- Updated the MCEO bits in the EVCTRL Register for 8-bit, 16-bit and 32-bit Modes- Updated The MC Bits in the INTENCLR, INTENSET, and INTFLAG Registers for 8-bit, 16-bit and 32-bit Modes- Updated the CCBUFV bit in the STATUS Register for 8-bit, 16-bit and 32-bit Modes- Updated the INVEN Bit in the DRVCTRL Register for 8-bit, 16-bit and 32-bit Modes21) Configurable Custom Logic (CCL)- Updated text in Overview- Updated the Block Diagram- Updated the table in Signal Description- Updated Linked LUT- Updated Analog Comparator Inputs- Removed erroneous TCC text- Updated the INSEL bits in the LUTCTRL0 Register- Updated the INSEL bits in the LUTCTRL1 Register22) Analog-to-Digital Converter (ADC)- Updated Features- Updated the Block Diagram- Updated the text in ADC Resolution- Added a note in Oversampling and Decimation- Updated the CTRLC Register23) Analog Comparators (AC)- Updated the text in VDD Scaler- Updated the START bits in the CTRLB Register- Updated the COMPEO, COMPEI, and INVEI bits in the EVCTRL Register- Updated the COMP bits in the INTENCLR, INTENSET, and INTFLAG Registers- Updated the STATE bits in the STATUSA Register- Updated the READY bits in the STATUSB Register- Updated the COMPCTRL bits in the SYNCBUSY Register24) Digital-to-Analog Converter (DAC)- Updated Features- Updated Dithering Mode25) Operational Amplifier Controller (OPAMP)- Updated the diagram in 184.108.40.206 Offset Compensation- Updated the READY bits of the STATUS Register26) Electrical Characteristics- Updated the note in Absolute Maximum Ratings- Removed erroneous data from the External Components Requirements
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